Search

Xiaolin Lin Chen

from San Ramon, CA
Age ~66
Get Report
Also known as:
Xiaolin C Chen, Xiaolin L Chen, Xiao Lin Chen, Xiaolin C Sharron, Chen Xiaolin
Phone and address:
536 Wycombe Ct, San Ramon, CA 94583
(510) 304-0492
Related to:
Shiou Y Chen, 69Chiy Chen, 67Lanku Chen, 74Frank Chen, 63Huai Chen, 55Hua C Wei, 67
Connected to:
Aaron C Chen, 48Agnes H Chen, 50Aharon A Chen, 67Aiai Chen, 34Aini Chen, 35Aiqing Chen, 47Amy T Chen, 61Andreas Chen, 34Anna Chen, 50Anne H Chen, 55

Xiaolin Chen Phones & Addresses

  • 536 Wycombe Ct, San Ramon, CA 94583 (510) 304-0492
  • 7518 Denison Pl, Castro Valley, CA 94552
  • Elkridge, MD
  • Foster City, CA
  • Silver Spring, MD
  • San Jose, CA
  • Beltsville, MD
  • San Francisco, CA
  • Fremont, CA
  • Alameda, CA
  • 536 Wycombe Ct, San Ramon, CA 94583

Resumes

Resumes

Xiaolin Chen Photo 1

Xiaolin Chen

View page
Location:
San Francisco, CA
Industry:
Consumer Electronics
Education:
University of Maryland
Doctorates, Doctor of Philosophy, Electronics Engineering, Philosophy Peking University
Master of Science, Masters Beijing University of Posts and Telecommunications
Bachelors, Bachelor of Science, Applied Mathematics
Skills:
Digital Signal Processors
Firmware
Embedded Systems
Software Architectural Design
Image Processing
Video Processing
Medical Devices
C
C++
Python
Java
Matlab
Rtos
Linux
Android Development
Analog
Asic
Machine Learning
Xilinx
Languages:
English
Mandarin
Xiaolin Chen Photo 2

Xiaolin Chen

View page
Xiaolin Chen Photo 3

Staff Cae At Synopsys Inc.

View page
Position:
CAE at Synopsys Inc.
Location:
San Francisco Bay Area
Industry:
Computer Software
Work:
Synopsys Inc.
CAE
Ikanos Communications 2000 - 2001
Sr. Verification Engineer
Cirrus Logic 1999 - 2000
Staff Systems Enginner
Acuson 1993 - 1998
ASIC Verification Engineer
Skills:
EDA
Verilog
Formal Verification

Business Records

Name / Title
Company / Classification
Phones & Addresses
Xiaolin Chen
Principal
Chinese Photographers
Photo Portrait Studio
7518 Denison Pl, Hayward, CA 94552

Publications

Us Patents

Hdp-Cvd Dep/Etch/Dep Process For Improved Deposition Into High Aspect Ratio Features

View page
US Patent:
6908862, Jun 21, 2005
Filed:
May 3, 2002
Appl. No.:
10/138189
Inventors:
Dongqing Li - Santa Clara CA, US
Xiaolin C. Chen - San Jose CA, US
Lin Zhang - San Jose CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L021/311
US Classification:
438700, 438666, 438667, 438668, 438672, 438673, 438978, 216 39
Abstract:
A method of depositing a film on a substrate disposed in a substrate processing chamber. The method includes depositing a first portion of the film by forming a high density plasma from a first gaseous mixture flown into the process chamber. The deposition processes is then stopped and part of the deposited first portion of the film is etched by flowing a halogen etchant into the processing chamber. Next, the surface of the etched film is passivated by flowing a passivation gas into the processing chamber, and then a second portion of the film is deposited over the first portion by forming a high density plasma from a second gaseous mixture flown into the process chamber. In one embodiment the passivation gas consists of an oxygen source with our without an inert gas.

Deposition-Selective Etch-Deposition Process For Dielectric Film Gapfill

View page
US Patent:
7081414, Jul 25, 2006
Filed:
May 23, 2003
Appl. No.:
10/445240
Inventors:
Lin Zhang - San Jose CA, US
Xiaolin Chen - San Jose CA, US
DongQing Li - Santa Clara CA, US
Thanh N Pham - San Jose CA, US
Farhad K Moghadam - Saratoga CA, US
Zhuang Li - San Jose CA, US
Padmanabhan Krishnaraj - San Francisco CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/302
US Classification:
438710, 438221, 438706, 438723
Abstract:
A deposition/etching/deposition process is provided for filling a gap in a surface of a substrate. A liner is formed over the substrate so that distinctive reaction products are formed when it is exposed to a chemical etchant. The detection of such reaction products thus indicates that the portion of the film deposited during the first etching has been removed to an extent that further exposure to the etchant may remove the liner and expose underlying structures. Accordingly, the etching is stopped upon detection of distinctive reaction products and the next deposition in the deposition/etching/deposition process is begun.

Hdp-Cvd Seasoning Process For High Power Hdp-Cvd Gapfil To Improve Particle Performance

View page
US Patent:
7109114, Sep 19, 2006
Filed:
May 7, 2004
Appl. No.:
10/841582
Inventors:
Xiaolin Chen - San Jose CA, US
Jason Bloking - Santa Clara CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/44
US Classification:
438680, 438513, 438905
Abstract:
A method of operating a substrate processing chamber that includes, prior to a substrate processing operation, flowing a seasoning gas comprising silane and oxygen into said chamber at a flow ratio of greater than or equal to about 1. 6:1 oxygen to silane to deposit a silicon oxide film over at least one aluminum nitride nozzle exposed to an interior portion of the chamber. Also, a substrate processing system that includes a housing, a gas delivery system for introducing a seasoning gas into a vacuum chamber, where the gas delivery system comprises one or more aluminum nitride nozzles exposed to the vacuum chamber, a controller and a memory having a program having instructions for controlling the gas delivery system to flow a seasoning gas that has an oxygen to silane ratio greater than or equal to about 1. 6:1 to deposit a silicon oxide film on the aluminum nitride nozzles.

Post Deposition Plasma Treatment To Increase Tensile Stress Of Hdp-Cvd Sio

View page
US Patent:
7465680, Dec 16, 2008
Filed:
Sep 7, 2005
Appl. No.:
11/221303
Inventors:
Xiaolin Chen - San Jose CA, US
Srinivas D. Nemani - Sunnyvale CA, US
DongQing Li - Fremont CA, US
Jeffrey C. Munro - Santa Clara CA, US
Marlon E. Menezes - Mountain View CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/31
H01L 21/469
US Classification:
438788, 438778, 438782, 438787, 438798, 257E21625
Abstract:
A plasma treatment process for increasing the tensile stress of a silicon wafer is described. Following deposition of a dielectric layer on a substrate, the substrate is lifted to an elevated position above the substrate receiving surface and exposed to a plasma treatment process which treats both the top and bottom surface of the wafer and increases the tensile stress of the deposited layer. Another embodiment of the invention involves biasing of the substrate prior to plasma treatment to bombard the wafer with plasma ions and raise the temperature of the substrate. In another embodiment of the invention, a two-step plasma treatment process can be used where the substrate is first exposed to a plasma at a processing position directly after deposition, and then raised to an elevated position where both the top and bottom of the wafer are exposed to the plasma.

Deposition-Selective Etch-Deposition Process For Dielectric Film Gapfill

View page
US Patent:
7691753, Apr 6, 2010
Filed:
Jun 5, 2006
Appl. No.:
11/422150
Inventors:
Lin Zhang - San Jose CA, US
Xiaolin Chen - San Jose CA, US
DongQing Li - Santa Clara CA, US
Thanh N. Pham - San Jose CA, US
Farhad K. Moghadam - Saratoga CA, US
Zhuang Li - San Jose CA, US
Padmanabhan Krishnaraj - San Francisco CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/302
US Classification:
438740, 438706, 438714, 438738
Abstract:
A deposition/etching/deposition process is provided for filling a gap in a surface of a substrate. A liner is formed over the substrate so that distinctive reaction products are formed when it is exposed to a chemical etchant. The detection of such reaction products thus indicates that the portion of the film deposited during the first etching has been removed to an extent that further exposure to the etchant may remove the liner and expose underlying structures. Accordingly, the etching is stopped upon detection of distinctive reaction products and the next deposition in the deposition/etching/deposition process is begun.

Post Deposition Plasma Treatment To Increase Tensile Stress Of Hdp-Cvd Sio

View page
US Patent:
7745351, Jun 29, 2010
Filed:
Oct 15, 2008
Appl. No.:
12/252260
Inventors:
Xiaolin Chen - San Jose CA, US
Srinivas D. Nemani - Sunnyvale CA, US
DongQing Li - Fremont CA, US
Jeffrey C. Munro - Santa Clara CA, US
Marlon E. Menezes - Mountain View CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/31
H01L 21/469
US Classification:
438788, 438782, 438798, 257E21241
Abstract:
Methods of forming a dielectric layer where the tensile stress of the layer is increased by a plasma treatment at an elevated position are described. In one embodiment, oxide and nitride layers are deposited on a substrate and patterned to form an opening. A trench is etched into the substrate. The substrate is transferred into a chamber suitable for dielectric deposition. A dielectric layer is deposited over the substrate, filling the trench and covering mesa regions adjacent to the trench. The substrate is raised to an elevated position above the substrate support and exposed to a plasma which increases the tensile stress of the substrate. The substrate is removed from the dielectric deposition chamber, and portions of the dielectric layer are removed so that the dielectric layer is even with the topmost portion of the nitride layer. The nitride and pad oxide layers are removed to form the STI structure.

Deposition-Selective Etch-Deposition Process For Dielectric Film Gapfill

View page
US Patent:
7799698, Sep 21, 2010
Filed:
Jun 5, 2006
Appl. No.:
11/422159
Inventors:
Lin Zhang - San Jose CA, US
Xiaolin Chen - San Jose CA, US
DongQing Li - Santa Clara CA, US
Thanh N. Pham - San Jose CA, US
Farhad K. Moghadam - Saratoga CA, US
Zhuang Li - San Jose CA, US
Padmanabhan Krishnaraj - San Francisco CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01I 21/302
US Classification:
438740, 438 9, 438706, 438720
Abstract:
A deposition/etching/deposition process is provided for filling a gap in a surface of a substrate. A liner is formed over the substrate so that distinctive reaction products are formed when it is exposed to a chemical etchant. The detection of such reaction products thus indicates that the portion of the film deposited during the first etching has been removed to an extent that further exposure to the etchant may remove the liner and expose underlying structures. Accordingly, the etching is stopped upon detection of distinctive reaction products and the next deposition in the deposition/etching/deposition process is begun.

Deposition-Plasma Cure Cycle Process To Enhance Film Quality Of Silicon Dioxide

View page
US Patent:
7902080, Mar 8, 2011
Filed:
May 25, 2007
Appl. No.:
11/753968
Inventors:
Xiaolin Chen - San Jose CA, US
Srinivas D. Nemani - Sunnyvale CA, US
Shankar Venkataraman - Santa Clara CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/302
US Classification:
438723, 438706, 438725, 438743, 216 80
Abstract:
Methods of filling a gap on a substrate with silicon oxide are described. The methods may include the steps of introducing an organo-silicon precursor and an oxygen precursor to a deposition chamber, reacting the precursors to form a first silicon oxide layer in the gap on the substrate, and etching the first silicon oxide layer to reduce the carbon content in the layer. The methods may also include forming a second silicon oxide layer on the first layer, and etching the second layer to reduce the carbon content in the second layer. The silicon oxide layers are annealed after the gap is filled.
Control profile
Xiaolin Lin Chen from San Ramon, CA, age ~66 Get Report