Thomas H Koschmieder

7067907, Jun 27, 2006

Mar 27, 2003

10/401171

Thomas H. Koschmieder - Austin TX, US
Terry E. Burnette - New Braunfels TX, US

Freescale Semiconductor, Inc. - Austin TX

H01L 23/02

257678, 257784

Improved electro-mechanical connections between a packaged semiconductor die () and a printed circuit board () with reduced standoff height and pitch are created by the use of a non-planar semiconductor package substrate () having a surface with angulated portions. Electrically conductive surfaces () are formed over the angulated portions. In one embodiment, the electrically conductive surfaces may be formed by forming an electrically conductive surface () over a non-planar or angulated package substrate (). The electrically conductive angulated surfaces improve reliability of solder joints () upon connecting the packaged semiconductor die to the printed circuit board (). The gaps within the solder mask openings provide a thin profile and improved pitch. In one form, the die may be on a same side of the package as the angulated substrate surface.

7074627, Jul 11, 2006

Jun 29, 2004

10/879242

Terry E. Burnette - New Braunfels TX, US
Thomas H. Koschmieder - Austin TX, US

Freescale Semiconductor, Inc. - Austin TX

H01L 21/66

438 14, 438 15, 438 16, 438612, 438613, 438614, 257772, 257779

A solder system includes a lead (Pb) indicator and a solder flux. A method for forming a semiconductor device includes providing a carrier, applying the solder system to the carrier, coupling the terminal to the carrier via the solder system, melting the solder system to attach the terminal to the carrier and form a completed semiconductor device, and determining if the completed semiconductor device has a different predetermined property from the solder system.

7938016, May 10, 2011

Mar 20, 2009

12/408442

Thomas H. Koschmieder - Austin TX, US

Freescale Semiconductor, Inc. - Austin TX

G01N 19/08
G01B 7/16

73799, 73777, 257619

An apparatus and method uses a die having at least one perimeter side with multiple pads. A structure is positioned between the at least one perimeter side and the multiple pads having multiple layers within the die. The structure functions as both a strain gauge and a crack stop. The structure arrests cracks from propagating from the at least one perimeter side to an interior of the die and provides an electrical resistance value as a function of an amount of strain existing where the structure is positioned. In another form the structure is implemented on a substrate such as a printed circuit board rather than in a semiconductor die.

20020070451, Jun 13, 2002

Dec 8, 2000

09/733170

Terry Burnette - New Braunfels TX, US
Thomas Koschmieder - Austin TX, US
Andrew Mawer - Austin TX, US

H01L021/44
H01L021/48
H01L023/48
H01L029/40

257/737000, 438/613000, 257/738000, 257/778000, 438/108000, 257/786000, 438/612000, 438/666000

A semiconductor device () includes a semiconductor die () having electronic circuitry that is connected to a substrate (). The substrate () is used to interface the semiconductor die () to a printed circuit board (). The substrate () includes a plurality of bonding pads (). A first portion of the plurality of bonding pads are soldermask defined (SMD) bonding pads () and a second portion of the plurality of bonding pads are non-soldermask defined (NSMD) bonding pads (). Using a combination of SMD and NSMD bonding pads provides the advantages of good thermal cycling reliability and good bending reliability over devices that have only SMD bonding pads or NSMD bonding pads.

20030102535, Jun 5, 2003

Jan 15, 2003

10/342818

Terry Burnette - New Braunfels TX, US
Thomas Koschmieder - Austin TX, US
Andrew Mawer - Austin TX, US

H01L023/552

257/659000

A semiconductor device () includes a semiconductor die () having electronic circuitry that is connected to a substrate (). The substrate () is used to interface the semiconductor die () to a printed circuit board (). The substrate () includes a plurality of bonding pads (). A first portion of the plurality of bonding pads are soldermask defined (SMD) bonding pads () and a second portion of the plurality of bonding pads are non-soldermask defined (NSMD) bonding pads (). Using a combination of SMD and NSMD bonding pads provides the advantages of good thermal cycling reliability and good bending reliability over devices that have only SMD bonding pads or NSMD bonding pads.

20060077029, Apr 13, 2006

Oct 7, 2004

10/960676

Thomas Koschmieder - Austin TX, US

H01F 27/28

336223000

An inductive component is formed by stacking a plurality of layers of a strip comprising inductive element portions disposed at a flexible, non-conductive material to form a substrate, where each of inductive element portions is electrically coupled to an adjacent inductive element portion to form the inductive component.

20170098618, Apr 6, 2017

Dec 22, 2016

15/387938

- Austin TX, US
Thomas H. KOSCHMIEDER - Austin TX, US
Varughese MATHEW - Austin TX, US

H01L 23/00
H01L 23/495

The present disclosure provides for embodiments of packaged semiconductor devices. In one embodiment, a packaged semiconductor device for a die includes an exposed structure. The die has an active surface and a backside surface opposite the active surface. A first surface of the exposed structure is joined to die attach material, and the die attach material is further joined to the backside surface of the die. The exposed structure includes a plurality of openings through the exposed structure within a perimeter of the die, and the die is exposed through the plurality of openings.

20160247738, Aug 25, 2016

Feb 19, 2015

14/626242

- AUSTIN TX, US
THOMAS H. KOSCHMIEDER - AUSTIN TX, US

H01L 23/26
H05K 1/18
H01L 21/48
H01L 23/31
H01L 23/498

A device includes an integrated circuit (IC) carrier for a semiconductor device, and a coating on the IC carrier. In the presence of an electrical field or a magnetic field, the coating includes a first functional group that attracts anions and a second functional group that attracts cations.