Resumes
Resumes
![Stefano Zanatta Photo 1 Stefano Zanatta Photo 1](/img/not-found.png)
Senior Dft Engineer
View pageLocation:
15 Nopalitos Way, Aliso Viejo, CA 92656
Industry:
Semiconductors
Work:
LSI Corporation since Sep 2011
DFT engineer
STMicroelectronics, Inc Sep 2007 - Sep 2011
Senior DFT Engineer, section manager
STMicroelectronics, Inc Aug 2005 - Sep 2007
DFT Engineer
STMicroelectronics, Srl Mar 2001 - Aug 2005
Product/Test Engineer
DFT engineer
STMicroelectronics, Inc Sep 2007 - Sep 2011
Senior DFT Engineer, section manager
STMicroelectronics, Inc Aug 2005 - Sep 2007
DFT Engineer
STMicroelectronics, Srl Mar 2001 - Aug 2005
Product/Test Engineer
Education:
University of Padova 1993 - 2000
Electrical Engineering MS, Telecommunication Systems Liceo Scientifico 1988 - 1993
Electrical Engineering MS, Telecommunication Systems Liceo Scientifico 1988 - 1993
Skills:
Soc
Dft
Debugging
Asic
Jtag
Formal Verification
Vlsi
Testing
Hardware Architecture
Bist
Ncsim
Silicon
Yield
Failure Analysis
Atpg
Static Timing Analysis
Timing Closure
Primetime
Rtl Design
Eda
System on A Chip
Very Large Scale Integration
Dft
Debugging
Asic
Jtag
Formal Verification
Vlsi
Testing
Hardware Architecture
Bist
Ncsim
Silicon
Yield
Failure Analysis
Atpg
Static Timing Analysis
Timing Closure
Primetime
Rtl Design
Eda
System on A Chip
Very Large Scale Integration
Languages:
English
![Stefano Zanatta Photo 2 Stefano Zanatta Photo 2](/img/not-found.png)
Hardware Engineer At Stmicroelectronics
View pagePosition:
hardware engineer at STMicroelectronics
Location:
Greater Denver Area
Industry:
Semiconductors
Work:
STMicroelectronics
hardware engineer
hardware engineer
Education:
Università degli Studi di Padova 1993 - 2000