Search

Samir S Hemaidan

from Cedar Rapids, IA
Age ~71
Get Report
Also known as:
Samir Shaheen Hemaidan, Sam Hemaidan, Samir Hermaidan, Samira C Hemeidan, Samir N, George Daoud
Phone and address:
3196 Falcon Dr, Cedar Rapids, IA 52402
(319) 393-2202
Related to:
Ramzi G HmaidanHeiam Hemaidan, 54Mitch HemaidanSamira C Hemeidan, 81Siham Hemaidan, 75
Connected to:
Danyette Hemanes, 44Derek Hemanes, 49Ali D Hemani, 26Nargis Hemani, 38Salman Hemani, 57Sana I Hemani, 38Zohra Z Hemani, 44Angela D Hemann, 51Cheryl A Hemann, 67Ciara A Hemann, 32

Samir Hemaidan Phones & Addresses

  • 3196 Falcon Dr, Cedar Rapids, IA 52402 (319) 393-2202
  • Hiawatha, IA
  • Rochester, NY

Work

Company: Rockwell collins 1979 to 2008 Position: Electrical engineer

Education

Degree: Bachelors, Bachelor of Science In Electrical Engineering School / High School: Rochester Institute of Technology 1976 to 1979 Specialities: Electronics Engineering, Electronics

Skills

Avionics • Systems Engineering • Engineering Management • Aerospace • Electrical Engineering • Aircraft • Embedded Systems • Do 178B • System Design

Industries

Airlines/Aviation

Resumes

Resumes

Samir Hemaidan Photo 1

Samir Hemaidan

View page
Location:
Cedar Rapids, IA
Industry:
Airlines/Aviation
Work:
Rockwell Collins 1979 - 2008
Electrical Engineer
Education:
Rochester Institute of Technology 1976 - 1979
Bachelors, Bachelor of Science In Electrical Engineering, Electronics Engineering, Electronics
Skills:
Avionics
Systems Engineering
Engineering Management
Aerospace
Electrical Engineering
Aircraft
Embedded Systems
Do 178B
System Design

Publications

Us Patents

Dissimilar Processor Synchronization In Fly-By-Wire High Integrity Computing Platforms And Displays

View page
US Patent:
8015390, Sep 6, 2011
Filed:
Mar 19, 2008
Appl. No.:
12/077599
Inventors:
James J. Corcoran - Cedar Rapids IA, US
Eric J. Danielson - Iowa City IA, US
Samir S. Hemaidan - Cedar Rapids IA, US
John W. Roltgen - Cedar Rapids IA, US
James E. Sisson - Robins IA, US
Mark A. Kovalan - Cedar Rapids IA, US
Mark C. Singer - Cedar Rapids IA, US
Assignee:
Rockwell Collins, Inc. - Cedar Rapids IA
International Classification:
G06F 11/00
US Classification:
712 12
Abstract:
A flight control system includes an output device, a first processor, and a second processor. The second processor is dissimilar to the first processor. The flight control system also includes a first arbitration device coupled to the first processor and a second arbitration device coupled to the second processor. The second arbitration device is configured to coordinate transaction synchronization with the first arbitration device and the first arbitration device is configured to coordinate transaction synchronization with the second arbitration device. A comparator processor is coupled to the first arbitration device and the second arbitration device. The comparator processor is configured to compare transaction synchronized outputs of the first and second processors and the comparator processor effectuates a command to the output device if the comparison is valid.

High Integrity Computing Via Input Synchronization Systems And Methods

View page
US Patent:
7852235, Dec 14, 2010
Filed:
Apr 28, 2008
Appl. No.:
12/150402
Inventors:
Douglas R. Johnson - Cedar Rapids IA, US
James J. Corcoran - Cedar Rapids IA, US
Eric J. Danielson - Iowa City IA, US
John W. Roltgen - Cedar Rapids IA, US
Mark A. Kovalan - Cedar Rapids IA, US
Corydon J. Carlson - Cedar Rapids IA, US
John L. Persick - Robins IA, US
Cleveland C. Gilbert - Cedar Rapids IA, US
Samir S. Hemaidan - Cedar Rapids IA, US
Shawn M. Stanger - Marion IA, US
Assignee:
Rockwell Collins, Inc. - Cedar Rapids IA
International Classification:
G08B 21/00
G08B 29/00
G06F 11/00
G01C 23/00
US Classification:
340945, 340506, 340507, 340508, 340522, 701 3, 701 14, 714 11, 714 12
Abstract:
A method of comparing output information from dissimilar processors includes storing a task in a first memory and storing the task in a second memory at substantially the same time as the first memory. The time of the storing being is controlled by a first arbitration logic and a second arbitration logic. The method also includes receiving the task by a first processor from the first memory and receiving the task by a second processor from the memory at substantially the same time as the first processor. The time being received is controlled by a first arbitration logic and a second arbitration logic. The second processor being dissimilar to the first processor. The method further includes computing a first output by the first processor based on the task and computing a second output by the second processor based on the task. The method still further includes, synchronizing the first and second outputs so that the first and second outputs are output at substantially the same time. The synchronizing is controlled by the first and second arbitration logic.
Control profile
Samir S Hemaidan from Cedar Rapids, IA, age ~71 Get Report