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Qiuqun Qi

from Hanover Park, IL
Age ~62
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Also known as:
Kevin Qi, Quiqun Qi, Qinqun Qi, Qi Qiuqun, Bill Trogdon, Qiwqun Gang, John Cimbala
Related to:
Erik Anderson, 35Lawrence StilesRebecca Martinez, 38Audrie StilesJoseph Trogdon, 42
Connected to:
Ami Y Qi, 54Amy L Qi, 61Angela Y Qi, 43Carolyn Qi, 26Chaolong Qi, 45Emily H Qi, 58Gary G Qi, 67Guangyan Qi, 40Hairong Qi, 53Hengwei Qi, 41

Qiuqun Qi Phones & Addresses

  • Hanover Park, IL
  • 1012 Biltmore Dr, Elgin, IL 60120 (630) 289-7261
  • 1030 Hermitage Cir, Hoffman Estates, IL 60169 (847) 519-9190
  • Schaumburg, IL
  • Fremont, CA
  • Glendale Heights, IL
  • Trenton, NJ
  • Hughson, CA

Professional Records

License Records

Qiuqun Qi

Address:
Elgin, IL 60120
License #:
450001840 - Expired
Issued Date:
Jun 15, 2004
Expiration Date:
Nov 30, 2014
Type:
Licensed Home Inspector

Publications

Us Patents

Read-Write Control Circuit For Magnetic Tunnel Junction Mram

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US Patent:
6552928, Apr 22, 2003
Filed:
Nov 8, 2001
Appl. No.:
10/011063
Inventors:
Qiuqun Qi - Fremont CA
Xizeng Shi - Fremont CA
Assignee:
Read-Rite Corporation - Fremont CA
International Classification:
G11C 1114
US Classification:
365171
Abstract:
An MRAM data storage device has at least one digit line, at least one bit line, and at least one MRAM cell disposed proximate to a digit line and electrically connected to a bit line. Each end of each digit line is connected to a write current source and a write current sink. One end of each bit line is connected to a write current source and a read current source while the other end of each bit line is connected to a write current sink. Two logic signals R and D are used to determine the direction of the write current in the digit line, to select between the read current and the write current in the bit line. The state of the MRAM cell is read by detecting the voltage drop across the cell when a read current is applied.

Mram Memory Array Having Merged Word Lines

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US Patent:
6680863, Jan 20, 2004
Filed:
Jul 9, 2002
Appl. No.:
10/192276
Inventors:
Xizeng Shi - Fremont CA
Qiuqun Qi - Fremont CA
Assignee:
Western Digital (Fremont), Inc. - Fremont CA
International Classification:
G11C 1114
US Classification:
365171, 365173
Abstract:
A method and system for providing and using a magnetic memory including magnetic memory cells is disclosed. The method and system include providing a magnetic tunneling junction including a first ferromagnetic layer, a second ferromagnetic layer and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer. The magnetic memory cell is coupled to a merged word line and a bit line. The merged word line selects the magnetic memory cell during a reading and carries a write current for the magnetic memory cell during writing. The bit line provides current to the magnetic memory cell during the reading and the writing. The currents provided by the bit line and the merged word line during writing allow data to be written to the magnetic memory cell.

Temperature Dependent Write Current Source For Magnetic Tunnel Junction Mram

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US Patent:
6687178, Feb 3, 2004
Filed:
Dec 7, 2001
Appl. No.:
10/017925
Inventors:
Qiuqun Qi - Fremont CA
Xizeng Shi - Fremont CA
Assignee:
Western Digital (Fremont), Inc. - Fremont CA
International Classification:
G11C 704
US Classification:
365211, 36518901, 365213, 365158
Abstract:
An MRAM storage device includes temperature dependent current sources that adjust their outputs as temperature varies. Temperature dependent current sources include one or more diodes connected to a transistor. As temperature varies so does the voltage drop across the diodes. In addition, the MRAM data storage device includes at least one digit line, at least one bit line, and at least one MRAM cell disposed proximate to a junction of a digit line and a bit line. Each end of each digit line is connected to temperature dependent current sources and current sinks. One end of each bit line is connected to a temperature dependent current source while the other end of each bit line is connected to a current sink. Two logic signals R and D are used to activate a write operation and determine the direction of the write current in the digit line.

Designs Of Reference Cells For Magnetic Tunnel Junction (Mtj) Mram

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US Patent:
6697294, Feb 24, 2004
Filed:
Jan 22, 2002
Appl. No.:
10/055118
Inventors:
Qiuqun Qi - Fremont CA
Xizeng Shi - Fremont CA
Matthew R. Gibbons - Livermore CA
Assignee:
Western Digital (Fremont), Inc. - Fremont CA
International Classification:
G11C 702
US Classification:
365210, 365173, 365209
Abstract:
A reference cell circuit for a magnetic tunnel junction MRAM includes two magnetic tunnel junctions where one is always set to a low resistance state and the other is always set to a high resistance state. The two magnetic tunnel junctions are connected between two segments of a bit line. The reference cell also includes a digit line that crosses both of the bit line segments.

Designs Of Reference Cells For Magnetic Tunnel Junction (Mtj) Mram

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US Patent:
6721203, Apr 13, 2004
Filed:
Dec 12, 2001
Appl. No.:
10/017647
Inventors:
Qiuqun Qi - Fremont CA
Xizeng Shi - Fremont CA
Matthew R. Gibbons - Livermore CA
Assignee:
Western Digital (Fremont), Inc. - Fremont CA
International Classification:
G11C 1115
US Classification:
365173, 365158, 365209
Abstract:
A reference cell circuit for a magnetic tunnel junction MRAM includes a first magnetic tunnel junction device set to a low resistance state and a second magnetic tunnel junction device set to a high resistance state. A reference cell series unit includes the first magnetic tunnel junction device electrically coupled in series with the second magnetic tunnel junction device. The reference cell series unit further has a first end and a second end with the first end being electrically coupled to a first current source and the second end being electrically coupled to a current sink and a second current source.

Temperature Dependent Write Current Source For Magnetic Tunnel Junction Mram

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US Patent:
6834010, Dec 21, 2004
Filed:
Dec 18, 2003
Appl. No.:
10/741841
Inventors:
Qiuqun Qi - Fremont CA
Xizeng Shi - Fremont CA
Assignee:
Western Digital (Fremont), Inc. - Fremont CA
International Classification:
G11C 700
US Classification:
36518505, 36518911
Abstract:
An MRAM storage device includes temperature dependent current sources that adjust their outputs as temperature varies. Temperature dependent current sources include one or more diodes connected to a transistor. As temperature varies so does the voltage drop across the diodes. In addition, the MRAM data storage device includes at least one digit line, at least one bit line, and at least one MRAM cell disposed proximate to a junction of a digit line and a bit line. Each end of each digit line is connected to temperature dependent current sources and current sinks. One end of each bit line is connected to a temperature dependent current source while the other end of each bit line is connected to a current sink. Two logic signals R and D are used to activate a write operation and determine the direction of the write current in the digit line.

High Sensitivity Common Source Amplifier Mram Cell, Memory Array And Read/Write Scheme

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US Patent:
6512690, Jan 28, 2003
Filed:
Nov 21, 2001
Appl. No.:
09/990425
Inventors:
Qiuqun (Kevin) Qi - Fremont CA
Xizeng Shi - Fremont CA
Assignee:
Read-Rite Corporation - Fremont CA
International Classification:
G11C 1114
US Classification:
365171, 365158
Abstract:
In the present invention, a magnetic random access memory (MRAM) cell includes a magnetic tunnel junction (MTJ) and a transistor. This memory cell provides a boosted output signal between different MTJ states stored. A method that is used by MRAM array for providing larger output voltage signal is also disclosed. The memory may comprise a plurality of such cells which are wired to form XY array. The source of the transistor is coupled to one end of the magnetic tunneling junction, while the drain of the transistor is coupled with an output for reading the magnetic memory cell. Another end of the magnetic tunneling junction is grounded. During reading, a constant voltage is applied to the gate of the transistor in selected memory cell. The drain of the transistor is connected to supply voltage via a load. The transistor functions both as switching element and amplifier to boost the output signal between different MTJ states.
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Qiuqun Qi from Hanover Park, IL, age ~62 Get Report