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Prashant Aji Phones & Addresses

  • Davis, CA
  • 1655 Newport Ave, San Jose, CA 95125 (408) 294-0072
  • 158 Kittoe Dr, Mountain View, CA 94043
  • Milpitas, CA
  • San Francisco, CA
  • Santa Clara, CA
  • Yolo, CA
  • 1655 Newport Ave, San Jose, CA 95125

Work

Company: Goalkeeper development sj Jan 2019 Position: Field hockey coach

Education

School / High School: Imd Business School 2017 to 2018 Specialities: Leadership, Business

Skills

Cross Functional Team Leadership • Semiconductors • Semiconductor Industry • Product Management • Metrology • Engineering Management • Design of Experiments • Product Development • Ic • Product Marketing • Electronics • Product Lifecycle Management • Yield • Manufacturing • Software Development • Program Management • Management • Sales • Image Processing • Automation • Mems • Spc • Engineering • Photolithography • Research and Development • Thin Films • Failure Analysis

Languages

French • Hindi

Industries

Semiconductors

Resumes

Resumes

Prashant Aji Photo 1

Vice President Of Marketing And Business Development

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Location:
1655 Newport Ave, San Jose, CA 95125
Industry:
Semiconductors
Work:
Goalkeeper Development Sj
Field Hockey Coach

Applied Materials
Vice President of Marketing and Business Development

Asml Jan 2016 - May 2018
Head of Program Management

Kla-Tencor Aug 2011 - Jan 2016
Senior Director, Head of Marketing Swift

Kla-Tencor Mar 2010 - Aug 2011
Senior Director, Strategic Marketing Wafer Inspection Division
Education:
Imd Business School 2017 - 2018
University of Cincinnati
Masters, Master of Science In Electrical Engineering
College of Engineering Pune
Bachelor of Engineering, Bachelors, Electrical Engineering
Skills:
Cross Functional Team Leadership
Semiconductors
Semiconductor Industry
Product Management
Metrology
Engineering Management
Design of Experiments
Product Development
Ic
Product Marketing
Electronics
Product Lifecycle Management
Yield
Manufacturing
Software Development
Program Management
Management
Sales
Image Processing
Automation
Mems
Spc
Engineering
Photolithography
Research and Development
Thin Films
Failure Analysis
Languages:
French
Hindi

Publications

Us Patents

Inspection System Setup Techniques

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US Patent:
7072786, Jul 4, 2006
Filed:
Sep 28, 2005
Appl. No.:
11/238357
Inventors:
David Bruce Coldren - San Jose CA, US
Prashant A. Aji - San Jose CA, US
David Winslow Randall - Redwood City CA, US
Sharon Marie McCauley - San Jose CA, US
Assignee:
KLA-Tencor Technologies, Corporation - Milpitas CA
International Classification:
G06F 19/00
G06K 9/00
US Classification:
702 83, 382145
Abstract:
Techniques for efficiently setting up inspection, metrology, and review systems for operating upon semiconductor wafers are described. Specifically, this involves setting up recipes that allows each system to accurately inspect semiconductor wafers. The invention gathers pertinent information from these tools and presents the information to users in a way that greatly reduces the time required to complete a recipe. One system embodiment includes an inspection system and a review station that is communicatively linked such that the review station can read from and write to an entire set of data stored at the inspection system. The set of data includes image files of features detected by the inspection system.

Apparatus And Methods For Searching Through And Analyzing Defect Images And Wafer Maps

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US Patent:
7283659, Oct 16, 2007
Filed:
Jun 18, 2002
Appl. No.:
10/175229
Inventors:
David R. Bakker - Cupertino CA, US
Prashant A. Aji - San Jose CA, US
James L. Belliveau - Los Gatos CA, US
Chacko C. Neroth - Sunnyvale CA, US
Assignee:
KLA-Tencor Technologies Corporation - Milpitas CA
International Classification:
G06K 9/00
US Classification:
382149, 382144, 382145
Abstract:
Disclosed are methods and apparatus for automatically organizing and/or analyzing a plurality of defect images without first providing a predefined set of classified images (herein referred to as a training set). In other words, sorting is not based on a training set or predefined classification codes for such defect images. In one embodiment, the defect images each include associated identifying data, such as a fabrication identifier, lot number, wafer number, and layer identifier. Initially, the defect images are sorted according to at least a portion of the associated identifying data into a plurality of “identifying data groups” or image families. The defect data in each identifying data group is then automatically sorted according to defect appearance. That is, similar defect images are associated with a single bin and similar bins are associated with other similar bins. For example, similar bins are arranged next to each other within a graphical user interface (GUI).

Inspection System Setup Techniques

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US Patent:
20040038454, Feb 26, 2004
Filed:
Nov 14, 2002
Appl. No.:
10/298389
Inventors:
David Coldren - San Jose CA, US
Prashant Aji - San Jose CA, US
David Randall - Redwood City CA, US
Sharon McCauley - San Jose CA, US
Assignee:
KLA-Tencor Technologies Corporation - Milpitas CA
International Classification:
G06F019/00
US Classification:
438/122000
Abstract:
Techniques for efficiently setting up inspection, metrology, and review systems for operating upon semiconductor wafers are described. Specifically, this involves setting up recipes that allows each system to accurately inspect semiconductor wafers. The invention gathers pertinent information from these tools and presents the information to users in a way that greatly reduces the time required to complete a recipe. One system embodiment includes an inspection system and a review station that is communicatively linked such that the review station can read from and write to an entire set of data stored at the inspection system. The set of data includes image files of features detected by the inspection system.

Methods And Systems For Measuring A Characteristic Of A Substrate Or Preparing A Substrate For Analysis

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US Patent:
20050221229, Oct 6, 2005
Filed:
Mar 22, 2005
Appl. No.:
11/086048
Inventors:
Mehran Nasser-Ghodsi - Hamilton MA, US
Mark Borowicz - San Jose CA, US
Dave Bakker - Cupertino CA, US
Mehdi Vaez-Iravani - Los Gatos CA, US
Prashant Aji - San Jose CA, US
Rudy Garcia - Union City CA, US
Tzu Chuang - Cupertino CA, US
International Classification:
G03F009/00
A61N005/00
G21G005/00
G03C005/00
US Classification:
430296000, 430942000, 250492300
Abstract:
Methods and systems for measuring a characteristic of a substrate or preparing a substrate for analysis are provided. One method for measuring a characteristic of a substrate includes removing a portion of a feature on the substrate using an electron beam to expose a cross-sectional profile of a remaining portion of the feature. The feature may be a photoresist feature. The method also includes measuring a characteristic of the cross-sectional profile. A method for preparing a substrate for analysis includes removing a portion of a material on the substrate proximate to a defect using chemical etching in combination with an electron beam. The defect may be a subsurface defect or a partially subsurface defect. Another method for preparing a substrate for analysis includes removing a portion of a material on a substrate proximate to a defect using chemical etching in combination with an electron beam and a light beam.

Methods And Systems For Measuring A Characteristic Of A Substrate Or Preparing A Substrate For Analysis

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US Patent:
20080264905, Oct 30, 2008
Filed:
Apr 28, 2008
Appl. No.:
12/110759
Inventors:
Mehran Nasser-Ghodsi - Hamilton MA, US
Mark Borowicz - San Jose CA, US
Dave Bakker - Cupertino CA, US
Mehdi Vaez-Iravani - Los Gatos CA, US
Prashant Aji - San Jose CA, US
Rudy F. Garcia - Union City CA, US
Tzu Chin Chuang - Cupertino CA, US
International Classification:
H01L 21/306
C23F 1/00
US Classification:
216 84, 216 94, 15634511, 15634515
Abstract:
Methods and systems for measuring a characteristic of a substrate or preparing a substrate for analysis are provided. One method for measuring a characteristic of a substrate includes removing a portion of a feature on the substrate using an electron beam to expose a cross-sectional profile of a remaining portion of the feature. The feature may be a photoresist feature. The method also includes measuring a characteristic of the cross-sectional profile. A method for preparing a substrate for analysis includes removing a portion of a material on the substrate proximate to a defect using chemical etching in combination with an electron beam. The defect may be a subsurface defect or a partially subsurface defect. Another method for preparing a substrate for analysis includes removing a portion of a material on a substrate proximate to a defect using chemical etching in combination with an electron beam and a light beam.

Optical Defect Amplification For Improved Sensitivity On Patterned Layers

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US Patent:
20120113416, May 10, 2012
Filed:
Jul 15, 2010
Appl. No.:
13/384330
Inventors:
Steven R. Lange - Alamo CA, US
Stephane Durant - Biarritz, FR
Gregory L. Kirk - Pleasanton CA, US
Robert M. Danen - Pleasanton CA, US
Prashant Aji - San Jose CA, US
Assignee:
KLA-TENCOR CORPORATION - Milpitas CA
International Classification:
G01N 21/95
B32B 9/00
B32B 3/30
US Classification:
3562375, 428161, 4284111
Abstract:
A method for wafer defect inspection may include, but is not limited to: providing an inspection target; applying at least one defect inspection enhancement to the inspection target; illuminating the inspection target including the at least one inspection enhancement to generate one or more inspection signals associated with one or more features of the inspection target; detecting the inspection signals; and generating one or more inspection parameters from the inspection signals. An inspection target may include, but is not limited to: at least one inspection layer; and at least one inspection enhancement layer.

Using Three-Dimensional Representations For Defect-Related Applications

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US Patent:
20120316855, Dec 13, 2012
Filed:
Jun 8, 2011
Appl. No.:
13/156323
Inventors:
Allen Park - San Jose CA, US
Ellis Chang - Saratoga CA, US
Prashant A. Aji - San Jose CA, US
Steven R. Lange - Alamo CA, US
Assignee:
KLA-TENCOR CORPORATION - Milpitas CA
International Classification:
G06F 17/50
US Classification:
703 13
Abstract:
Various embodiments for using three-dimensional representations for defect-related applications are provided.

Autonomous Substrate Processing System

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US Patent:
20220214662, Jul 7, 2022
Filed:
Jan 6, 2021
Appl. No.:
17/143072
Inventors:
- Santa Clara CA, US
Lei Lian - Fremont CA, US
Pengyu Han - San Jose CA, US
Todd J. Egan - Fremont CA, US
Prashant Aji - San Jose CA, US
Eli Mor - Garden City ID, US
Alex J. Tom - San Francisco CA, US
Leonard Michael Tedeschi - San Jose CA, US
International Classification:
G05B 19/4155
G06N 20/00
Abstract:
A substrate processing system comprises one or more transfer chambers; a plurality of process chambers connected to the one or more transfer chambers; and a computing device connected to each of the plurality of process chambers. The computing device is to receive first measurements generated by sensors of a first process chamber during or after a process is performed within the first process chamber; determine that the first process chamber is due for maintenance based on processing the first measurements using a first trained machine learning model; after maintenance has been performed on the first process chamber, receive second measurements generated by the sensors during or after a seasoning process is performed within the first process chamber; and determine that the first process chamber is ready to be brought back into service based on processing the second measurements using a second trained machine learning model.
Prashant A Aji from Davis, CA, age ~59 Get Report