Resumes
Resumes
Prasad Gharpure Phones & Addresses
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1945 Blackfoot Dr, Fremont, CA 94539 (408) 888-0322
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44398 Camellia Dr, Fremont, CA 94539 (510) 623-9942
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1003 Charles View Way, Towson, MD 21204 (410) 823-1349
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Baltimore, MD
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3779 Blackford Ave, San Jose, CA 95117 (408) 296-2181
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3500 Granada Ave, Santa Clara, CA 95051
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Salt Lake City, UT
Publications
Us Patents
Method And System For Automating Unit Performance Testing In Integrated Circuit Design
View pageUS Patent:
7870524, Jan 11, 2011
Filed:
Sep 24, 2007
Appl. No.:
11/860475
Inventors:
Robert A. Alfieri - Chapel Hill NC, US
Rajeshwaran Selvanesan - Milpitas CA, US
Prasad Gharpure - Fremont CA, US
Rajeshwaran Selvanesan - Milpitas CA, US
Prasad Gharpure - Fremont CA, US
Assignee:
NVIDIA Corporation - Santa Clara CA
International Classification:
G06F 17/50
US Classification:
716 5, 716 1, 716 2, 716 4, 716 6, 716 18, 703 13, 703 14
Abstract:
A method and system for automating unit performance testing in integrated circuit design is disclosed. One embodiment of the present invention sets forth a method, which includes the steps of generating a first performance data for the unit to operate on a workload, embedding the first performance data in the workload for a register transfer level (RTL) implementation of the unit to operate on, and determining whether the expected performance of the unit is achieved based on the comparison between the first performance data and a second performance data, wherein the second performance data is generated after the RTL implementation of the unit operates on the workload.