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Pranav S Kotamraju

from Saratoga, CA
Age ~55
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Also known as:
Pranav Sundar Kotamaraju, Pranav S Kotamraj, Kotamraju Pranav, Pranav Y
Phone and address:
20580 Ashley Way, Saratoga, CA 95070
Related to:
Randal J Rossland, 61Heidi W Bhagat, 44Margarita Chichioco, 56Hans Winaler
Connected to:
Madhuri Kotamraju, 49Saikiran Kotamraju, 40Jerlyn S Kotan, 55Cheryl R Kotanen, 49Sarah B Kotani, 80Yasuka Kotani, 52Joel A Kotanko, 38Kristina M Kotansky, 42Raghavendra Kotapali, 43Madhavi Kotapati, 51

Pranav Kotamraju Phones & Addresses

  • 20580 Ashley Way, Saratoga, CA 95070
  • 1072 Queensbrook Dr, San Jose, CA 95129
  • Santa Clara, CA
  • 100 Tortoise Ln, Morrisville, NC 27560
  • Cary, NC
  • 398 Bayberry Way, Milpitas, CA 95035
  • Sunnyvale, CA
  • Wade, NC

Work

Company: Dialog semiconductor Apr 2018 Position: Principal analog design engineer

Education

Degree: Masters School / High School: University of Rhode Island 1992 to 1994 Specialities: Electronics Engineering, Electronics

Skills

Mixed Signal • Ic • Analog • Cmos • Analog Circuit Design • Vlsi • Semiconductors • Verilog • Soc • Eda • Fpga • Circuit Design • Physical Design • Functional Verification • Characterization

Industries

Semiconductors

Resumes

Resumes

Pranav Kotamraju Photo 1

Principal Analog Design Engineer

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Location:
San Jose, CA
Industry:
Semiconductors
Work:
Dialog Semiconductor
Principal Analog Design Engineer
Microchip Technology Jan 2009 - Mar 2015
Senior Design Engineer
Dialog Semiconductor Jan 2009 - Mar 2015
Senior Design Engineer
Education:
University of Rhode Island 1992 - 1994
Masters, Electronics Engineering, Electronics P.g. College of Law, Basheerbagh 1987 - 1991
Bachelor of Engineering, Bachelors, Electronics Hyderabad Public School
Skills:
Mixed Signal
Ic
Analog
Cmos
Analog Circuit Design
Vlsi
Semiconductors
Verilog
Soc
Eda
Fpga
Circuit Design
Physical Design
Functional Verification
Characterization

Publications

Us Patents

Fast Startup Bias Current Generator

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US Patent:
20190245499, Aug 8, 2019
Filed:
Feb 7, 2018
Appl. No.:
15/891221
Inventors:
- London, GB
Pranav Kotamraju - Santa Clara CA, US
International Classification:
H03F 3/45
H03F 1/02
Abstract:
A bias current generator is disclosed that include an operational amplifier that is self-biased during an inactive period with a bias current to bias a gate of an output transistor. Since the inactive period bias is close to an active period bias applied to the gate of the output transistor during active operation of the bias current generator, the speed of transition from the inactive period to the active period is enhanced by the self-biasing of the operational amplifier.
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Pranav S Kotamraju from Saratoga, CA, age ~55 Get Report