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Paul Lewis Patriacca

from Van Buren Twp, MI
Age ~54
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Also known as:
Paul L Patriacca
Phone and address:
9015 W Walden Dr, Belleville, MI 48111
Related to:
Matthew J Gustafson, 46
Connected to:
Ian L Patria, 41Mathew R Patria, 34Robert J Patriacca, 78Susan M Patria, 75Dimitrios Patrianakos, 69Alan J Patriarca, 62Antonio C Patriarca, 78Gregory R Patrias, 63John B Patriarche, 49Larry D Patrias, 67

Paul Patriacca Phones & Addresses

  • 9015 W Walden Dr, Belleville, MI 48111
  • Van Buren Twp, MI
  • Ann Arbor, MI
  • 3753 Pipers Dr, Hillsboro, OR 97123 (503) 681-8620
  • Beaverton, OR
  • 31352 Frans Hals Dr, Winchester, CA 92596
  • Grafton, MA
  • Lowell, MA

Work

Company: Guardian industries Jan 2008 Position: Process engineer

Education

Degree: Bachelors, Bachelor of Science School / High School: University of Massachusetts Lowell 1989 to 1994

Skills

Thin Films • Spc • Manufacturing • Design of Experiments • Semiconductors • Process Engineering • Sputtering • Vacuum • Coatings • Continuous Improvement • Optics • Lean Manufacturing • Solar Energy • Pvd • Photolithography • Statistical Process Control • Kaizen • Fmea • Polymers • Plastics • Etching

Industries

Semiconductors

Resumes

Resumes

Paul Patriacca Photo 1

Process Engineer

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Location:
9015 west Walden Dr, Belleville, MI 48111
Industry:
Semiconductors
Work:
Guardian Industries
Process Engineer
Intel Corporation Jun 2004 - Jul 2006
Photolithography Process Engineer
Spectra-Physics Feb 2001 - Apr 2002
Thin Film Process Engineer
Mobileaccess Networks Mar 1998 - Feb 2001
Senior Process Engineer
Quantum Dec 1995 - Mar 1998
Vacuum Process Technician Iii
Education:
University of Massachusetts Lowell 1989 - 1994
Bachelors, Bachelor of Science
Skills:
Thin Films
Spc
Manufacturing
Design of Experiments
Semiconductors
Process Engineering
Sputtering
Vacuum
Coatings
Continuous Improvement
Optics
Lean Manufacturing
Solar Energy
Pvd
Photolithography
Statistical Process Control
Kaizen
Fmea
Polymers
Plastics
Etching

Publications

Us Patents

Temperable Three Layer Antireflective Coating, Coated Article Including Temperable Three Layer Antireflective Coating, And/Or Method Of Making The Same

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US Patent:
20110157703, Jun 30, 2011
Filed:
Sep 3, 2010
Appl. No.:
12/923146
Inventors:
David M. Broadway - Northville MI, US
Yiwei Lu - Ann Arbor MI, US
Willem den Boer - Brighton MI, US
Darrell Golden - Canton MI, US
Paul Patriacca - Belleville MI, US
Gregory Scott - Shelby Township MI, US
Assignee:
Guardian Industries Corp. - Auburn Hills MI
International Classification:
G02B 1/11
B05D 5/06
US Classification:
359586, 427165, 427160
Abstract:
A coated article includes a temperable antireflection (AR) coating that utilizes medium and low index (index of refraction “n”) layers having compressive residual stress in the AR coating. In certain example embodiments, the coating may include the following layers from the glass substrate outwardly: silicon oxynitride (SiON) medium index layer/high index layer/low index layer. In certain example embodiments, depending on the chemical and optical properties of the high index layer and the substrate, the medium and low index layers of the AR coating are selected to cause a net compressive residual stress and thus optimize the overall performance of the antireflection coating when the coated article is tempered and/or heat-treated.
Control profile
Paul Lewis Patriacca from Van Buren Twp, MI, age ~54 Get Report