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Neal Rueger Phones & Addresses

  • 1306 Broxon St, Boise, ID 83705 (208) 429-8666
  • 711 Beeson St, Boise, ID 83706 (208) 429-8666
  • 209 Gettysburg St, Boise, ID 83706
  • 2820 Harmony Ave, Boise, ID 83706 (208) 429-8666
  • Indian Valley, ID
  • Wappingers Falls, NY
  • Saratoga Springs, NY
  • Round Lake, NY

Publications

Us Patents

Cleaning Efficiency Improvement In A High Density Plasma Process Chamber Using Thermally Hot Gas

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US Patent:
6606802, Aug 19, 2003
Filed:
Nov 30, 2001
Appl. No.:
09/998078
Inventors:
Gurtej S. Sandhu - Boise ID
Michael Li - Boise ID
Neal R. Rueger - Boise ID
Assignee:
Micron Technology Inc. - Boise ID
International Classification:
F26B 300
US Classification:
34448, 34 85, 34230, 34232
Abstract:
Method and apparatus are disclosed for improving the cleaning efficiency of a high density plasma system by introducing thermally hot gases to heat downstream chamber walls to improve the fluorine attack on deposit coatings. In certain embodiments of the invention, the cleaning gas and thermally hot gas are allowed into the region of the high vacuum pump to provide cleaning of the high vacuum pump.

System And Method For Detecting Flow In A Mass Flow Controller

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US Patent:
6627465, Sep 30, 2003
Filed:
Aug 30, 2001
Appl. No.:
09/945161
Inventors:
Gurtej Singh Sandhu - Boise ID
Sujit Sharan - Chandler AZ
Neal R. Rueger - Boise ID
Allen P. Mardian - Boise ID
Assignee:
Micron Technology, inc. - Bosie ID
International Classification:
H01L 2166
US Classification:
438 14, 430 15
Abstract:
Systems and methods are provided for detecting flow in a mass flow controller (MFC). The position of a gate in the MFC is sensed or otherwise determined to monitor flow through the MFC and to immediately or nearly immediately detect a flow failure. In one embodiment of the present invention, a novel MFC is provided. The MFC includes an orifice, a mass flow control gate, an actuator and a gate position sensor. The actuator moves the control gate to control flow through the orifice. The gate position sensor determines the gate position and/or gate movement to monitor flow and immediately or nearly immediately detect a flow failure. According to one embodiment of the present invention, the gate position sensor includes a transmitter for transmitting a signal and a receiver for receiving the signal such that the receiver provides an indication of the position of the gate based on the signal received. Other embodiments of the gate position sensor are described herein, as well as systems and methods that incorporate the novel MFC within a semiconductor manufacturing process.

Methods Of Incorporating Nitrogen Into Silicon-Oxide-Containing Layers

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US Patent:
6660657, Dec 9, 2003
Filed:
Aug 7, 2000
Appl. No.:
09/633556
Inventors:
Gurtej S. Sandhu - Boise ID
John T. Moore - Boise ID
Neal R. Rueger - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 2131
US Classification:
438775, 438777, 438776
Abstract:
The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed within the layer to bond at least some of the nitrogen to silicon within the layer. The invention also encompasses a method of forming a transistor. A gate oxide layer is formed over a semiconductive substrate. The gate oxide layer comprises silicon dioxide. The gate oxide layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer, and the layer is maintained at less than or equal to 400Â C. during the exposing. Subsequently, the nitrogen within the layer is thermally annealed to bond at least a majority of the nitrogen to silicon. At least one conductive layer is formed over the gate oxide layer.

Transistor Structures, Methods Of Incorporating Nitrogen Into Silicon-Oxide-Containing Layers; And Methods Of Forming Transistors

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US Patent:
6660658, Dec 9, 2003
Filed:
Jul 26, 2002
Appl. No.:
10/205235
Inventors:
Gurtej S. Sandhu - Boise ID
John T. Moore - Boise ID
Neal R. Rueger - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 2131
US Classification:
438775, 438776, 438777
Abstract:
The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed within the layer to bond at least some of the nitrogen to silicon within the layer. The invention also encompasses a method of forming a transistor. A gate oxide layer is formed over a semiconductive substrate. The gate oxide layer comprises silicon dioxide. The gate oxide layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer, and the layer is maintained at less than or equal to 400Â C. during the exposing. Subsequently, the nitrogen within the layer is thermally annealed to bond at least a majority of the nitrogen to silicon. At least one conductive layer is formed over the gate oxide layer.

Deposition And Chamber Treatment Methods

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US Patent:
6866900, Mar 15, 2005
Filed:
Jun 11, 2003
Appl. No.:
10/460624
Inventors:
Weimin Li - Boise ID, US
Neal R. Rueger - Boise ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
C23C016/00
US Classification:
427534, 4272481, 427299, 427331, 427337, 427579, 427237
Abstract:
The invention encompasses a method for sequentially processing separate sets of wafers within a chamber. Each set is subjected to plasma-enhanced deposition of material within the chamber utilizing a plasma that is primarily inductively coupled. After the plasma-enhanced deposition, and while the set remains within the chamber, the plasma is changed to a primarily capacitively coupled plasma. The cycling of the plasma from primarily inductively coupled to primarily capacitively coupled can increase the ratio of processed wafers to plasma reaction chamber internal sidewall cleanings that can be obtained while maintaining low particle counts on the processed wafers.

Methods Of Forming Semiconductor Constructions

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US Patent:
6908807, Jun 21, 2005
Filed:
Mar 26, 2002
Appl. No.:
10/108013
Inventors:
Neal R. Rueger - Boise ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L021/8238
US Classification:
438221, 438296, 438424
Abstract:
The invention includes a method of forming a semiconductor construction. A semiconductor substrate is placed within a reaction chamber. The substrate comprises a center region and an edge region surrounding the center region. The substrate comprises openings within the center region, and openings within the edge region. While the substrate is within the reaction chamber, a layer of insulative material is formed across the substrate. The layer is thicker over the one of the center region and edge region than over the other of the center region and edge region. The layer is exposed to an etch which removes the insulative material faster from over the one or the center region and edge region than from over the other of the center region and edge region.

Gas Delivery System For Deposition Processes, And Methods Of Using Same

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US Patent:
6936547, Aug 30, 2005
Filed:
Oct 31, 2002
Appl. No.:
10/284681
Inventors:
Weimin Li - Boise ID, US
Neal R. Rueger - Boise ID, US
Li Li - Meridian ID, US
Ross S. Dando - Nampa ID, US
Kevin T. Hamer - Meridian ID, US
Allen P. Mardian - Boise ID, US
Assignee:
Micron Technology, Inc.. - Boise ID
International Classification:
H01L021/31
US Classification:
438758, 438680
Abstract:
The present invention is generally directed to a novel gas delivery system for various deposition processes, and various methods of using same. In one illustrative embodiment, a deposition tool comprises a process chamber, a wafer stage adapted for holding a wafer positioned therein, and a gas delivery system positioned in the chamber above a position where a plasma will be generated in the chamber, wherein substantially all of a reactant gas is delivered into the chamber via the gas delivery system. In another illustrative embodiment, the reactant gas exiting the gas delivery system is directed so as to cover substantially all of an area defined by an upper surface of the wafer. In one illustrative embodiment, the method comprises positioning a wafer in a process chamber of a deposition tool, generating a plasma within the process chamber above the wafer, and forming a layer of material above the wafer by introducing substantially all of a reactant gas used to form the layer of material into the process chamber above the plasma via a gas delivery system positioned above the plasma. In another illustrative embodiment, the reactant gas exiting the gas delivery system is directed to cover substantially all of an area defined by an upper surface of the wafer.

Method And System For Monitoring Plasma Using Optical Emission Spectroscopy

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US Patent:
6950178, Sep 27, 2005
Filed:
Oct 9, 2003
Appl. No.:
10/682017
Inventors:
Neal R. Rueger - Boise ID, US
Kevin T. Hamer - Meridian ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
G01J003/443
US Classification:
356 72, 356316, 438 16
Abstract:
A method and system are presented for monitoring the optical emissions associated with a plasma used in integrated circuit fabrication. The optical emissions are processed by an optical spectrometer to obtain a spectrum. The spectrum is analyzed to determine the presence of particular disassociated species which are indicative of the presence of a suitable plasma and which are desired for a deposition, etching, or cleaning process.
Neal R Rueger from Boise, ID, age ~64 Get Report