Napoleone Te Cavlan

50755765, Dec 24, 1991

Dec 3, 1990

7/642655

Napoleone Cavlan - Cupertino CA

North American Philips Corporation - Sunnyvale CA

H03K 1912
H03K 1716

307465

A monolithic integrated circuit contains a field-programmable logic architecture centered on a single array of programmable gates that perform either logical NAND or logical NOR operations. Foldback loops can be readily programmed through the array to enable the user to achieve different numbers of logic levels.

47032065, Oct 27, 1987

Nov 19, 1985

6/799676

Napoleone Cavlan - Cupertino CA

Signetics Corporation - Sunnyvale CA

H03K 19177

307465

A field-programmable logic architecture is centered on a single array of programmable gates that perform either logical NAND or logical NOR operations. Foldback loops can be readily programmed through the array to enable the user to achieve different numbers of logic levels.

44220723, Dec 20, 1983

Jul 30, 1981

6/288576

Napoleone Cavlan - Cupertino CA

Signetics Corporation - Sunnyvale CA

H04Q 900

34082587

A field-programmable logic array (FPLA) circuit of both the single level logic type containing a programmable AND/NAND gate array and the multiple level logic type containing a programmable OR/NOR gate array responsive to data from a programmable AND/NAND gate array has the programmable capability for enabling certain device pins to switch between functioning as data output pins and data input pins. A sequential logic FPLA circuit containing the basic elements of the multiple level logic device has a plurality of JK flip-flops for on-chip data storage. Selected flip-flops may be directly loaded from pins also operable for supplying output data, may be dynamically converted to function as D-type flip-flops, or may be asynchronously preset/reset to desired logic states. These features are all controllable through on-chip programmable circuitry.