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Minkailu A Jalloh

from Poughkeepsie, NY
Age ~68

Minkailu Jalloh Phones & Addresses

  • 22 Hawkins St, Poughkeepsie, NY 12601 (845) 454-7508
  • Somerset, NJ
  • Laurel, MD
  • Greensboro, NC
  • 22 Hawkins St, Poughkeepsie, NY 12601

Work

Company: Ibm 1989 to Dec 31, 2014 Position: Process and manufacturing engineer

Education

School / High School: North Carolina Agricultural and Technical State University 1984 to 1989

Industries

Computer Hardware

Resumes

Resumes

Minkailu Jalloh Photo 1

Process Engineer

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Location:
Poughkeepsie, NY
Industry:
Computer Hardware
Work:
Ibm 1989 - Dec 31, 2014
Process and Manufacturing Engineer

Ibm 1989 - Dec 31, 2014
Process Engineer
Education:
North Carolina Agricultural and Technical State University 1984 - 1989
Prince of Wales School
St. Edward's Secondary School, Kingtom, Freetown
Fourah Bay College
University at Albany, Suny
North Carolina Agricultural and Technical State University

Publications

Us Patents

Solder Reflow Type Electrical Apparatus Packaging Having Integrated Circuit And Discrete Components

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US Patent:
6910615, Jun 28, 2005
Filed:
Mar 27, 2003
Appl. No.:
10/400944
Inventors:
Peter A. Gruber - Mohegan Lake NY, US
Minkailu A Jalloh - Poughkeepsie NY, US
Chon Cheong Lei - Poughkeepsie NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
B23K031/02
B23K037/00
US Classification:
228103, 228 8, 228119, 228207, 228215
Abstract:
In a solder reflow type building of modular electrical apparatus involving integrated circuit and discrete components, fabrication operations are arranged to include the providing of a general type series of steps for each component element involving a reflow or joining step at the highest joining temperature, immediately followed by a solder flux cleaning step and immediately followed by a testing of the entire module constructed thus far. There is provided a further specific type operation for each different type of component element that includes the providing of a loop for the introduction of a replacement for any broken discrete component with joining being achieved with use of a lower fusion temperature solder, flux cleaning and testing at each joining followed by reinsertion into the module. There is further provided an operation at the encapsulation stage of the module building for introducing underfill between the component and supporting carrier.

Plating Structure For A Pin Grid Array Package

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US Patent:
60511192, Apr 18, 2000
Filed:
Jan 12, 1998
Appl. No.:
9/005873
Inventors:
Paul F. Findeis - Glenham NY
Kenneth R. Idler - Blairstown NJ
Minkailu A. Jalloh - Poughkeepsie NY
Thomas A. Kelly - Blairstown NJ
Emanuele F. Lopergolo - Marlboro NY
Assignee:
International Business Machines Corporation - Armonk NY
General Wire & Stamping Company, Incorporated - Randolph NJ
International Classification:
C25D 1704
US Classification:
204297W
Abstract:
Disclosed is a plating structure including a substrate having a plurality of pins to be plated and a metallic plating screen having a plurality of apertures, wherein each of the apertures has at least two tabs spaced apart from each other, wherein the metallic plating screen is placed over the pins so that at least two pins penetrate each aperture, each of the pins contacting a tab of the aperture. Also disclosed is a method of electrolytically plating a plurality of pins utilizing the above metallic plating screen.
Minkailu A Jalloh from Poughkeepsie, NY, age ~68 Get Report