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John M Yuratovac

from Rancho Cucamonga, CA
Age ~67

John Yuratovac Phones & Addresses

  • 5544 Rock Creek Rd, Rch Cucamonga, CA 91739 (909) 899-6344
  • Rancho Cucamonga, CA
  • Portland, OR
  • Chino, CA

Work

Company: Zodiac inflight innovations Nov 2017 Position: Staff technical project manager

Education

Degree: Bachelors, Bachelor of Science School / High School: Bradley University 1975 to 1979 Specialities: Electronics Engineering

Industries

Electrical/Electronic Manufacturing

Resumes

Resumes

John Yuratovac Photo 1

Senior Engineering Portfolio Project Manager

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Location:
Rancho Cucamonga, CA
Industry:
Electrical/Electronic Manufacturing
Work:
Zodiac Inflight Innovations
Staff Technical Project Manager

General Micro Systems Aug 2001 - Mar 2010
Senior Electronics Design Engineer

Anigma Dec 1989 - Jul 2001
Principal Engineer

Intel Corporation Aug 1995 - Mar 1997
Staff Engineer

Extron Electronics Aug 1995 - Mar 1997
Senior Engineering Portfolio Project Manager
Education:
Bradley University 1975 - 1979
Bachelors, Bachelor of Science, Electronics Engineering

Publications

Us Patents

Method And Apparatus For Setting The Operating Parameters Of A Computer System

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US Patent:
60473738, Apr 4, 2000
Filed:
Sep 30, 1997
Appl. No.:
8/940636
Inventors:
Jerald N. Hall - Scappoose OR
Orville H. Christeson - Hillsboro OR
Mike Kinion - Hillsboro OR
Sean R. Babcock - Portland OR
Frank L. Wildgrube - Hillsboro OR
Frank E. LeClerg - Hillsboro OR
John Yuratovac - Rancho Cucamonga CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 900
G06F 944
US Classification:
713 1
Abstract:
An apparatus includes a configuration selector that is selectively configurable to denote one of a plurality of operating modes for the apparatus, including a configuration mode. The apparatus further comprising a programmable multiplexer, a processor, a bus, and a storage medium having stored therein a basic input/output system (BIOS) equipped to operate in any one of the plurality of operating modes, including the configuration mode wherein the BIOS facilitates user programming of a plurality of operating parameters for the apparatus. The programmable multiplexer, responsive to the configuration selector, asserts a default bus/core ratio common to a plurality of processors and buses that can be employed to form the apparatus when the configuration selector is configured to denote the configuration mode of operation. The processor, coupled to the storage medium and the programmable multiplexer, operates to execute the BIOS, in a speed consistent with the asserted bus/core ratio. The bus, coupled to the programmable multiplexer, the processor and the storage medium, operates to provide instructions and data to the processor, including the BIOS, in a speed consistent with the asserted bus/core ratio.

Method And Apparatus For Updating A Basic Input/Output System

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US Patent:
61227331, Sep 19, 2000
Filed:
Sep 30, 1997
Appl. No.:
8/941535
Inventors:
Orville H. Christeson - Hillsboro OR
Frank L. Wildgrube - Hillsboro OR
Frank E. LeClerg - Hillsboro OR
Jerald Nevin Hall - Scappoose OR
Mike Kinion - Hillsboro OR
Sean R. Babcock - Portland OR
John Yuratovac - Rancho Cucamonga CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 9445
US Classification:
713 2
Abstract:
An apparatus includes a storage medium having stored therein a segmented basic input/output system (BIOS) divided among a plurality of segments within the storage medium, and a processor operative to execute the segmented BIOS. In accordance with the teachings of the present invention, the BIOS includes a recovery function that is mode dependent in that while the apparatus is in an update mode the recovery function executes a full reflash of all relevant segments of the segmented BIOS, whereas while the apparatus is in a normal mode the recovery function executes a partial reflash of only identified corrupted BIOS segments.

Method And Apparatus For Setting The Operating Parameters Of A Computer System

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US Patent:
62567314, Jul 3, 2001
Filed:
Nov 15, 1999
Appl. No.:
9/440150
Inventors:
Jerald N. Hall - Scappoose OR
Orville H. Christeson - Hillsboro OR
Mike Kinion - Hillsboro OR
Sean R. Babcock - Portland OR
Frank L. Wildgrube - Hillsboro OR
Frank E. LeClerg - Hillsboro OR
John Yuratovac - Rancho Cucamonga CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 900
G06F 944
US Classification:
713 1
Abstract:
An apparatus includes a configuration selector that is selectively configurable to denote one of a plurality of operating modes for the apparatus, including a configuration mode. The apparatus further comprising a programmable multiplexer, a processor, a bus, and a storage medium having stored therein a basic input/output system (BIOS) equipped to operate in any one of the plurality of operating modes, including the configuration mode wherein the BIOS facilitates user programming of a plurality of operating parameters for the apparatus. The programmable multiplexer, responsive to the configuration selector, asserts a default bus/core ratio common to a plurality of processors and buses that can be employed to form the apparatus when the configuration selector is configured to denote the configuration mode of operation. The processor, coupled to the storage medium and the programmable multiplexer, operates to execute the BIOS, in a speed consistent with the asserted bus/core ratio. The bus, coupled to the programmable multiplexer, the processor and the storage medium, operates to provide instructions and data to the processor, including the BIOS, in a speed consistent with the asserted bus/core ratio.
John M Yuratovac from Rancho Cucamonga, CA, age ~67 Get Report