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John V Spohnheimer

from Carrollton, TX
Age ~68
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Also known as:
John Victor Spohnheimer, John L Spohnheimer, John Spohnheimer Revocable Agreement, John Spohnheimer Agreement, Joh Spohnheimer, Spohnheimer Agreement John, John R, Aubrey Smart, Spohnheimer Joh
Phone and address:
2158 Mccoy Rd, Carrollton, TX 75006
(972) 242-6577
Related to:
Scott David Mitchell, 66Victor SpohnheimerCatherine Kinkade, 33Iola SpohnheimerMary Spohnheimer, 73Ryan Kinkade, 32
Connected to:
Richard C Spohnholz, 74Christine A Spohr, 57Diane S Spohr, 64Diana Spokaite, 47Ina K Spokas, 58Maureen T Spokas, 71Patrick F Spokas, 34Karla F Spoke, 62Marlys G Spokely, 85Pauline F Spokoiny, 88

John Spohnheimer Phones & Addresses

  • 2158 Mccoy Rd, Carrollton, TX 75006 (972) 242-6577
  • Donnellson, IA
  • Lewisville, TX
  • The Colony, TX
  • 2158 Mccoy Rd, Carrollton, TX 75006 (210) 269-3932

Work

Company: Maxim integrated products Mar 2001 to Jun 2009 Position: Characterization manager

Education

Degree: BSEE & BS-Physics School / High School: Iowa State University 1974 to 1979 Specialities: Analog Circuits, RF-communications, Solid-state physics, Semiconductor physics, Quantum physics

Industries

Semiconductors

Public records

Vehicle Records

John Spohnheimer

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Address:
2158 Mccoy Rd, Carrollton, TX 75006
Phone:
(972) 242-6577
VIN:
1NXBR30E67Z783237
Make:
TOYOTA
Model:
COROLLA
Year:
2007

Resumes

Resumes

John Spohnheimer Photo 1

Semiconductors Professional

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Location:
Dallas/Fort Worth Area
Industry:
Semiconductors
Work:
Maxim Integrated Products Mar 2001 - Jun 2009
Characterization Manager
Dallas Semiconductor Feb 1985 - Mar 2001
Laser Trim Development Manager / Staff Engineer
Mostek Jul 1979 - Feb 1985
Product Engineer
Education:
Iowa State University 1974 - 1979
BSEE & BS-Physics, Analog Circuits, RF-communications, Solid-state physics, Semiconductor physics, Quantum physics

Publications

Us Patents

Method And Apparatus For Focusing A Laser Beam On An Integrated Circuit

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US Patent:
43586597, Nov 9, 1982
Filed:
Jul 13, 1981
Appl. No.:
6/282865
Inventors:
John V. Spohnheimer - The Colony TX
Assignee:
Mostek Corporation - Carrollton TX
International Classification:
B23K 2700
US Classification:
219121LB
Abstract:
A laser beam (38) is focused on the surface of a semiconductor substrate (10) by translating an objective lens (70) along the path of the laser beam (38). The substrate (10) is fabricated to have a region (12) of an opposite conductivity type and to have a barrier layer (18) to the laser beam (38). An opening (16) is provided in the barrier layer (18) to permit the laser beam (38) to strike the substrate (10). A voltage source (24) and resistance (26) are connected in series between the substrate (10) and the region (12) to form a reverse biased diode junction. When the laser beam (38) strikes the substrate (10) charge carriers (42) are generated to produce a current through the resistor (26). The current flow through the circuit is measured by a control circuit (84) which drives a mechanism (72, 74, 76, 78, 80) to position the objective lens (70) such that the focus point of the laser beam (38) is positioned at the surface of the substrate (10). The maximum current flow through the PN junction is produced when the maximum intensity of laser energy is directed to the substrate (10).

Method And Apparatus For Aligning An Integrated Circuit

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US Patent:
44069499, Sep 27, 1983
Filed:
Jul 13, 1981
Appl. No.:
6/282858
Inventors:
John V. Spohnheimer - The Colony TX
Assignee:
Mostek Corporation - Carrollton TX
International Classification:
G01B 1100
US Classification:
250548
Abstract:
A method and apparatus are disclosed for aligning an integrated circuit die (110) by use of a machine which directs a laser beam (32) downward on a wafer containing the die (110). Each die (110) is provided with one or more targets (52, 64, 78). A target (52) comprises an N+ region (56) within the target (52) and a layer of polysilicon (56) over an oxide layer (70). A laser beam (32) is scanned across the target (52) to detect a transition across an edge of a polysilicon layer (68). The transition is detected by the generation of charge carriers (36) within the region (34). The region (34) has an opposite conductivity type from that of the substrate (10) thus forming a PN junction. The PN junction is reversed biased by a voltage source (38) which is connected in series with a resistor (40) between the substrate (10) and the region (34). A center point is determined by calculating the midpoint between transitions. The establishment of a center of the target (52) establishes a reference point.

Termination Region Architecture For Vertical Power Transistors

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US Patent:
20180277673, Sep 27, 2018
Filed:
Oct 17, 2017
Appl. No.:
15/786246
Inventors:
- Addison TX, US
John V. Spohnheimer - Carrollton TX, US
Zhijun Qu - Frisco TX, US
International Classification:
H01L 29/78
H01L 29/739
H01L 29/06
H01L 29/40
Abstract:
A vertical power switching device, such as a vertical superjunction metal-oxide-semiconductor field-effect-transistor (MOSFET), in which termination structures in the corners of the integrated circuit are stretched to efficiently shape the lateral electric field. Termination structures in the device include such features as doped regions, field plates, insulator films, and high-voltage conductive regions and elements at the applied substrate voltage. Edges of these termination structures are shaped and placed according to a 2-order smooth, non-circular analytic function so as to extend deeper into the die corner from the core region of the device than a constant-distance path. Also disclosed are electrically floating guard rings in the termination region, to inhibit triggering of parasitic p-n-p-n structures.

Termination Region Architecture For Vertical Power Transistors

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US Patent:
20170098705, Apr 6, 2017
Filed:
Oct 2, 2015
Appl. No.:
14/873831
Inventors:
- Addison TX, US
John V. Spohnheimer - Carrollton TX, US
Zhijun Qu - Frisco TX, US
International Classification:
H01L 29/78
H01L 29/06
H01L 29/739
H01L 29/40
Abstract:
A vertical power switching device, such as a vertical superjunction metal-oxide-semiconductor field-effect-transistor (MOSFET), in which termination structures in the corners of the integrated circuit are stretched to efficiently shape the lateral electric field. Termination structures in the device include such features as doped regions, field plates, insulator films, and high-voltage conductive regions and elements at the applied substrate voltage. Edges of these termination structures are shaped and placed according to a 2-order smooth, non-circular analytic function so as to extend deeper into the die corner from the core region of the device than a constant-distance path. Also disclosed are electrically floating guard rings in the termination region, to inhibit triggering of parasitic p-n-p-n structures.
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John V Spohnheimer from Carrollton, TX, age ~68 Get Report