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John E Dring

from San Jose, CA
Age ~52
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Also known as:
Johnny E Dring
Phone and address:
7112 Earlswood Ct, San Jose, CA 95120
Related to:
Allison M Dring, 50Diane Thao Vo, 62Thao T Vu, 50Cuong H Vu, 53Steven Vu, 41Anne M Dring, 77Steven D VuPhong V Vu, 76T Dring
Connected to:
Amanda N Dring, 36Arthur R Dring, 104Barton J Dring, 62Colleen M Dring, 60James M Dring, 54Karl A Dring, 78Gale R Dringenberg, 70Sunnie Dringenberg, 78Debra L Dringle, 66Denise Drinhouser, 53

John Dring Phones & Addresses

  • 7112 Earlswood Ct, San Jose, CA 95120
  • 516 Tigerwood Way, San Jose, CA 95111
  • Sunnyvale, CA
  • Walnut Creek, CA
  • Mountain View, CA
  • 9426 Aldabra Ct, San Diego, CA 92129
  • San Luis Obispo, CA

Resumes

Resumes

John Dring Photo 1

Vice President Of Engineering

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Location:
San Francisco, CA
Industry:
Semiconductors
Work:
Vital Connect, Inc. Oct 2012 - Aug 2016
Senior Vice President, Product Development
Voler Systems Oct 2012 - Aug 2016
Vice President of Engineering
Plx Technology Oct 2010 - Dec 2012
Executive Vice President, Phy Engineering and Architecture
Teranetics Mar 2004 - Oct 2010
Senior Director, Architecture and Applications
Intel Corporation Feb 2003 - Mar 2004
Principal Wireless Architect
Education:
California Polytechnic State University - San Luis Obispo 1990 - 1995
Bachelors, Bachelor of Science, Electrical Engineering, Architecture
Skills:
Asic
Embedded Systems
Digital Signal Processors
Fpga
Semiconductors
Soc
Firmware
Verilog
Mixed Signal
Debugging
Analog
Hardware
Cloud Computing
System on A Chip
Wireless
Testing
Processors
Microcontrollers
Embedded Software
Software Development
Product Development
Product Management
Wireless Technologies
Application Specific Integrated Circuits
Rtl Design
Field Programmable Gate Arrays
Healthcare
Mobile Phone Software
Scalability
Software Project Management
Big Data
Strategic Planning
Strategy
John Dring Photo 2

John Dring

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Business Records

Name / Title
Company / Classification
Phones & Addresses
John Dring
Marketing Director
United Parcel Service Inc
Business Services, NEC
6060 Cornerstone Ct W, San Diego, CA 92121
(858) 455-8800
John E. Dring
President
DK ENTERPRISES
9426 Aldabra Ct, San Diego, CA 92129
John E. Dring
M
Dunemere Associates, LLC
1257 Virginia Way, La Jolla, CA 92037
3316 Lockerbie Dr SE, Albuquerque, NM 87124
3470 Silver Maple Dr, Danville, CA 94506
PO Box 1574, Fort Bragg, CA 95437
John Dring
Chief Operating Officer
CARTRIDGE WORLD NORTH AMERICA, LLC
Franchising Company · Whol Stationery/Office Supplies
3106 N Us Hwy 12 STE A, Spring Grove, IL 60081
5743 Horton St, Oakland, CA 94608
6460 Hollis St, Oakland, CA 94608
3917 Mercy Dr, Volo, IL 60050
(510) 594-9900, (510) 428-9102
John Dring
Home Place, LLC
Investment Management
7514 Girard Ave, La Jolla, CA 92037

Publications

Us Patents

Interfacing Media Access Control (Mac) With A Low-Power Physical Layer (Phy) Control

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US Patent:
8321708, Nov 27, 2012
Filed:
Apr 2, 2009
Appl. No.:
12/384298
Inventors:
John Dring - San Jose CA, US
Jose Tellado - Mountain View CA, US
Dimitry Taich - San Jose CA, US
Assignee:
Aquantia Corp. - Milpitas CA
International Classification:
G06F 1/32
G06F 1/00
US Classification:
713323, 713320, 713324
Abstract:
An apparatus and method of interfacing physical layer (PHY) control with media access control (MAC) is disclosed. One method includes signaling to the PHY control to operate in a low-power mode when the MAC is detected to be transmitting idle patterns. The MAC transitioning from transmitting the idle patterns to transmitting data can be detected. When the transition is detected, the PHY control is signaled to transition to a wake up mode. Data from the MAC is buffered while the PHY control is in the wake up mode. The buffered data is provided to the PHY control after the PHY control has completed the wake up mode.

Method And System Of Biasing A Timing Phase Estimate Of Data Segments Of A Received Signal

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US Patent:
20030235252, Dec 25, 2003
Filed:
Jun 19, 2002
Appl. No.:
10/176300
Inventors:
Jose Tellado - Sunnyvale CA, US
John Dring - San Jose CA, US
International Classification:
H04L027/00
US Classification:
375/259000
Abstract:
The present invention provides a method and system for biasing a timing phase estimate of data segments of a received wireless signal. The method includes receiving the wireless signal. A timing phase estimate of the data segments of the wireless signal is pre-set depending upon a phase estimator estimate. The timing phase estimate of the data segments of the wireless signal is further biased as a function of a quality parameter of the wireless signal. The data segments are processed generating a receiving data stream.

Method And System Of Frequency And Time Synchronization Of A Transceiver To Signals Received By The Transceiver

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US Patent:
20040052228, Mar 18, 2004
Filed:
Sep 16, 2002
Appl. No.:
10/245261
Inventors:
Jose Tellado - Mountain View CA, US
John Dring - San Jose CA, US
International Classification:
H04Q007/00
H04J003/06
US Classification:
370/334000, 370/350000
Abstract:
The present invention provides a method and system for synchronizing a receiver. The method includes receiving a plurality of wireless signals that have traveled through at least one of multiple transmitter antennas and multiple receiver antennas. The receiver is time and frequency synchronized to each of the wireless signals based upon joint statistics of the plurality of wireless signals. The joint statistics can be a function of data patterns, time of arrival estimations, frequency offset estimations, phase offset estimations, timing offset estimations, error correction codes, post processing SNR, pre-processing SNR, PER, BER, correlator outputs, delay spread or doppler spread, of each of the plurality of wireless signals.

Multiple Channel Wireless Receiver

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US Patent:
20040198276, Oct 7, 2004
Filed:
Mar 26, 2002
Appl. No.:
10/107124
Inventors:
Jose Tellado - Mountain View CA, US
John Dring - San Jose CA, US
International Classification:
H04B001/00
US Classification:
455/132000, 455/134000, 455/135000, 455/067110
Abstract:
The present invention provides a method and system for receiving a plurality of information signals at a receiver. The information signals each traveling through a corresponding transmission channel. The receiver includes a plurality of receiver channels, wherein each receiver channel receives a corresponding information signal. An amplitude of each received information signal associated with each receiver channel is adjusted so the amplitudes of all the received information signals are as great as possible, while still maintaining a target level of signal error of each of the received information signals. The amplitudes of the received information signals can be additionally adjusted so that the signal errors of each of the received information signals are approximately equal. Each receiver channel can be calibrated by measuring a noise reference and a distortion reference for aiding in the estimation of the received information bit stream. The received information signals can be multiple carrier signals, and calibrating each receiver channel can be accomplished by receiving the multiple carrier signals in which at least one sub-carrier of the received multiple carrier signals is nulled, and the noise reference and the distortion reference of each receiver channel are estimated during the reception of the nulled sub-carrier. The receiver can include spatial processing and demodulation that provides estimation of the received information bit stream for spatially multiplexed or transmit diversity received information signals.

Parallel Feedback Processing

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US Patent:
20050289204, Dec 29, 2005
Filed:
Jun 29, 2004
Appl. No.:
10/880052
Inventors:
Jose Tellado - Sunnyvale CA, US
Glenn Golden - Boulder CO, US
Sanjay Kasturia - Palo Alto CA, US
Jeffrey Hill - San Jose CA, US
John Dring - San Jose CA, US
International Classification:
G06F007/00
US Classification:
708300000
Abstract:
Embodiments of a parallel feedback processor are disclosed. The parallel feedback processor includes a plurality of parallel coupled feedback filters. Each feedback filter includes a non-linear operator. At least one of feedback filter includes a plurality of sub-filters. Each sub-filter computes a one of possible non-linear operator filter outputs of the at least one feedback filter. One sub-filter output is selected as an output of the at least one feedback filter.

Method And Apparatus For Fast Link Recovery

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US Patent:
20120014420, Jan 19, 2012
Filed:
Aug 16, 2010
Appl. No.:
12/857080
Inventors:
Jiangfeng Wu - San Jose CA, US
Jose Tellado - Mountain View CA, US
John Dring - San Jose CA, US
Nima Ferdosi - San Jose CA, US
Assignee:
TERANETICS, INC. - San Jose CA
International Classification:
H04L 5/16
H04B 17/00
US Classification:
375219, 375224
Abstract:
Embodiments of methods and apparatus for fast link recover are disclosed. One method includes sensing a link quality failure of a link between a receiver and a transmitter. If a link quality failure is sensed, then the receiver selects new pre-coder settings for the transmitter. The receiver communicates the new pre-coder settings to the transmitter. The transmitter applies the new pre-coder settings. The receiver computes its equalizer settings based on the new pre-coder settings of the transmitter. One apparatus or transceiver includes a means for determining a link quality failure of a link between the transceiver and a link partner transceiver. The transceiver selects new pre-coder settings for the link partner transceiver if a link quality failure is sensed. Additionally, the transceiver communicates the new pre-coder settings to the link partner transceiver, and computes its equalizer settings based on the new pre-coder settings of the link partner transceiver.
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John E Dring from San Jose, CA, age ~52 Get Report