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Jerry Richard Kukulka

from Fishkill, NY
Age ~70

Jerry Kukulka Phones & Addresses

  • 203 Stony Brook Rd, Fishkill, NY 12524 (845) 896-5013
  • Diamond Bar, CA
  • Brookfield, CT
  • Santa Clara, CA
  • Sylmar, CA
  • Saugus, CA
  • Blossburg, PA
  • 203 Stony Brook Rd, Fishkill, NY 12524 (661) 713-1468

Work

Position: Medical Professional

Publications

Us Patents

Solar Cell Structure Utilizing An Amorphous Silicon Discrete By-Pass Diode

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US Patent:
6784358, Aug 31, 2004
Filed:
Nov 8, 2002
Appl. No.:
10/291350
Inventors:
Jerry R. Kukulka - Santa Clarita CA
Assignee:
The Boeing Co. - Seattle WA
International Classification:
H01L 3105
US Classification:
136244, 136256, 136258, 136261, 136252, 136255, 136249
Abstract:
A solar cell structure includes a solar cell that produces a voltage when illuminated, and a discrete amorphous silicon by-pass diode. A first by-pass diode terminal of the amorphous silicon by-pass diode is electrically connected to a first side of an active semiconductor structure of the solar cell, and a second by-pass diode terminal of the amorphous silicon by-pass diode is electrically connected to a second side of the active semiconductor structure. Alternatively, the first by-pass diode terminal of the amorphous silicon by-pass diode may be electrically connected to the first side of the active semiconductor structure of the solar cell, and the second by-pass diode terminal of the amorphous silicon by-pass diode may be electrically connected to a second side of the active semiconductor structure of another solar cell.

Semiconductor Structure With Metal Migration Semiconductor Barrier Layers And Method Of Forming The Same

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US Patent:
7202542, Apr 10, 2007
Filed:
Dec 17, 2003
Appl. No.:
10/739755
Inventors:
Hojun Yoon - Stevenson Ranch CA, US
Richard King - Thousand Oaks CA, US
Jerry R. Kukulka - Santa Clarita CA, US
James H. Ermer - Burbank CA, US
Maggy L. Lau - Hacienda Heights CA, US
Assignee:
The Boeing Company - Chicago IL
International Classification:
H01L 27/14
US Classification:
257428, 257434, 257751
Abstract:
A semiconductor structure includes a semiconductor substrate, a semiconductor active region, a semiconductor contact layer, at least one metal migration semiconductor barrier layer, and a metal contact. The metal migration semiconductor barrier layer may be embedded within the semiconductor contact layer. Furthermore, the metal migration semiconductor barrier layer may be located underneath or above and in intimate contact with the semiconductor contact layer. The metal migration semiconductor barrier layer and the semiconductor contact layer form a contact structure that prevents metals from migrating from the metal contact into the semiconductor active layer during long-term exposure to high temperatures. By providing a robust contact structure that may be used in semiconductor structures, for example in solar cells that power spacecraft or terrestrial solar cells used under concentrated sunlight, the high temperature reliability of the semiconductor structure will be improved and the operation time will be prolonged.

Solar Cell With High-Temperature Front Electrical Contact, And Its Fabrication

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US Patent:
7285720, Oct 23, 2007
Filed:
Jul 21, 2003
Appl. No.:
10/623900
Inventors:
Jerry R. Kukulka - Santa Clarita CA, US
Maggy L. Lau - Hacienda Heights CA, US
Peter Hebert - Sierra Madre CA, US
Assignee:
The Boeing Company, Inc. - Seattle WA
International Classification:
H01L 31/0236
US Classification:
136256, 136261, 136262, 427 74
Abstract:
A solar cell has an active semiconductor structure and a back electrical contact overlying and contacting an active semiconductor structure back side. A front electrical contact is applied overlying and contacting the active semiconductor structure front side. The front electrical contact has multiple layers including a titanium layer overlying and contacting the active semiconductor structure front side, a diffusion layer overlying and contacting the titanium layer, a barrier layer overlying and contacting the diffusion layer, and a joining layer overlying and contacting the barrier layer. The front electrical contact may be applied by sequentially vacuum depositing the titanium layer, the diffusion layer, the barrier layer, and the joining layer in a vacuum deposition apparatus in a single pumpdown from ambient pressure. A front electrical lead is affixed overlying and contacting an attachment pad region of the front electrical contact.

Solar Cell Structure With By-Pass Diode And Wrapped Front-Side Diode Interconnection

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US Patent:
7335835, Feb 26, 2008
Filed:
Nov 8, 2002
Appl. No.:
10/295060
Inventors:
Jerry R. Kukulka - Santa Clarita CA, US
David R. Lillington - Rancho Palos Verdes CA, US
Assignee:
The Boeing Company - Chicago IL
International Classification:
H01L 31/00
US Classification:
136256, 136252
Abstract:
A solar cell structure includes a solar cell having a front side and a back side and an active semiconductor structure. The solar cell produces a voltage when the front side is illuminated. The solar cell is protected by a by-pass diode structure including a by-pass diode positioned at the back side of the solar cell. A first electrical interconnection structure extends between the back side of the solar cell and the first diode terminal, and a second electrical interconnection structure extends between the front side of the solar cell and the second diode terminal. An entire length of the second electrical interconnection structure contacts the solar cell.

Method Of Forming A Semiconductor Structure Having Metal Migration Semiconductor Barrier Layers

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US Patent:
7687386, Mar 30, 2010
Filed:
Feb 20, 2007
Appl. No.:
11/676953
Inventors:
Hojun Yoon - Stevenson Ranch CA, US
Richard King - Thousand Oaks CA, US
Jerry R. Kukulka - Santa Clarita CA, US
James H. Ermer - Burbank CA, US
Maggy L. Lau - Hacienda Heghts CA, US
Assignee:
The Boeing Company - Chicago IL
International Classification:
H01L 21/28
US Classification:
438572, 257E21386, 257E21387
Abstract:
A semiconductor structure includes a semiconductor substrate, a semiconductor active region, a semiconductor contact layer, at least one metal migration semiconductor barrier layer, and a metal contact. The metal migration semiconductor barrier layer may be embedded within the semiconductor contact layer. Furthermore, the metal migration semiconductor barrier layer may be located underneath or above and in intimate contact with the semiconductor contact layer. The metal migration semiconductor barrier layer and the semiconductor contact layer form a contact structure that prevents metals from migrating from the metal contact into the semiconductor active layer during long-term exposure to high temperatures. By providing a robust contact structure that may be used in semiconductor structures, for example in solar cells that power spacecraft or terrestrial solar cells used under concentrated sunlight, the high temperature reliability of the semiconductor structure will be improved and the operation time will be prolonged.

Solar Cell Assembly With Combined Handle Substrate And Bypass Diode And Method

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US Patent:
8283558, Oct 9, 2012
Filed:
Mar 27, 2009
Appl. No.:
12/413353
Inventors:
Jerry R. Kukulka - Santa Clarita CA, US
Assignee:
The Boeing Company - Chicago IL
International Classification:
H01L 31/00
US Classification:
136255
Abstract:
A solar cell assembly and method are disclosed. The solar cell assembly comprises a substrate having a front surface and a back surface, wherein the substrate has a p-n junction providing reverse bias protection, and wherein the substrate functions as a bypass diode. The solar cell assembly further comprises a multijunction solar cell having a plurality of solar cell layers, wherein the multijunction solar cell has a first surface and a second surface, the first surface being attached to the front surface of the substrate. The solar cell assembly further comprises an electrical connector element positioned adjacent the front surface of the substrate and the first surface of the multijunction solar cell, a first contact coupled to the back surface of the substrate, and at least one second contact coupled to a portion of the second surface of the multijunction solar cell.

Solar Cell With High-Temperature Front Electrical Contact

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US Patent:
8044295, Oct 25, 2011
Filed:
Sep 7, 2007
Appl. No.:
11/851737
Inventors:
Jerry R. Kukulka - Santa Clarita CA, US
Maggy L. Lau - Hacienda Heights CA, US
Peter Hebert - Sierra Madre CA, US
Assignee:
The Boeing Company, Inc. - Seattle WA
International Classification:
H01L 31/0224
US Classification:
136256, 136261, 136262
Abstract:
A solar cell has an active semiconductor structure and a back electrical contact overlying and contacting an active semiconductor structure back side. A front electrical contact is applied overlying and contacting the active semiconductor structure front side. The front electrical contact has multiple layers including a titanium layer overlying and contacting the active semiconductor structure front side, a diffusion layer overlying and contacting the titanium layer, a barrier layer overlying and contacting the diffusion layer, and a joining layer overlying and contacting the barrier layer. The front electrical contact may be applied by sequentially vacuum depositing the titanium layer, the diffusion layer, the barrier layer, and the joining layer in a vacuum deposition apparatus in a single pumpdown from ambient pressure. A front electrical lead is affixed overlying and contacting an attachment pad region of the front electrical contact.

Schottky Diode With Dielectric Isolation

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US Patent:
20050275057, Dec 15, 2005
Filed:
Jun 15, 2004
Appl. No.:
10/869071
Inventors:
Marc Breen - Hollywood CA, US
Jerry Kukulka - Santa Clarita CA, US
Deanna McMullin - Simi Valley CA, US
Dmitri Krut - Encino CA, US
David Joslin - Valley Village CA, US
International Classification:
H01L029/93
US Classification:
257480000
Abstract:
Methods and apparatus are provided for configuring a Schottky diode with reduced reverse leakage current. The apparatus comprises a dielectric layer interposed between a Schottky metal layer and a Schottky semiconductor layer. The dielectric layer is patterned to allow a limited amount of direct contact between the metal layer and the semiconductor layer, thereby controlling the size and configuration of the Schottky diode active area. Limiting the amount of active diode area can reduce the probability of leakage current due to localized shunts. Moreover, the dielectric layer can also be configured to inhibit diffusion from the metal layer to the semiconductor layer. Accordingly, the reverse leakage current of a Schottky diode with dielectric isolation is typically lower than that of a similar diode with no dielectric layer.
Jerry Richard Kukulka from Fishkill, NY, age ~70 Get Report