Janice P Chiu

7046068, May 16, 2006

Apr 27, 2004

10/832237

Janice Chiu - Tustin CA, US
Hooman Darabi - Long Beach CA, US

Broadcom Corporation - Irvine CA

G06F 7/44

327359, 455293

A receiver and receiver front end having multiple independent differential inputs, multiple independent differential low-noise amplifiers, and two sets of double-balanced IQ mixers. The double-balanced mixers include cross-coupled PMOS devices that dynamically inject current at zero-crossing points to cancel out tail currents in the mixers. Also, methods of operating the above-discussed receiver and receiver front end.

7133655, Nov 7, 2006

Mar 23, 2004

10/806140

Janice Chiu - Tustin CA, US

Broadcom Corporation - Irvine CA

H04B 17/00

4552264, 455 6711, 4551153, 4552262, 4551273, 4552532

A signal strength indicator circuit that includes a first amplifier configured to receive a first input signal from a first mixer and a second input signal from a second mixer;. The circuit also includes a second amplifier configured to receive a first set of differential inputs from the first amplifier. The circuit further includes a third amplifier configured to receive a second set of differential inputs from the second amplifier stage. Even further, the circuit includes an output port for emitting an output signal that is a rectified combination of the first input signal and the second input signal. Also, a method of processing signals input into a signal strength indicator circuit.

7187914, Mar 6, 2007

Apr 9, 2004

10/820812

Janice Chiu - Tustin CA, US

Broadcom Corporation - Irvine CA

H04B 17/00

4552262, 4552264, 4552341, 330279

A signal strength indicator circuit including a set of rectifiers. The set of rectifiers include an asymmetric switching pair of rectifiers that may be configured to provide an output signal that is inversely proportional to an input signal obtained from a device in a telecommunications system. The pair may be connected directly on one side thereof to a power supply and may be connected on another side thereof to the power supply through a resistor. Also, a method of processing a signal received by a signal strength indicator circuit.

7196582, Mar 27, 2007

Oct 29, 2004

10/977798

Hooman Darabi - Irvine CA, US
Janice Chiu - Tustin CA, US

Broadcom Corporation - Irvine CA

H03G 3/10

330285, 330289, 330278

Methods and systems for processing signals are disclosed herein. In one aspect of the invention a circuit for processing signals may comprise a triple well (TW) NMOS transistor coupled to an amplifier core. The TW NMOS transistor may track process and temperature variations (PVT) of at least one NMOS transistor within the amplifier core. A drain of the TW NMOS transistor may be coupled to a first inductor and the first inductor may be coupled to a first voltage source. The first voltage source may generate a standard voltage of about 1. 2V. A source of the TW NMOS transistor may be coupled to a second inductor and the second inductor may be coupled to the first voltage source. A gate of the TW NMOS transistor may be coupled to a second voltage source, where the second voltage source may generate a standard voltage of about 2. 5V.

7315192, Jan 1, 2008

Mar 21, 2006

11/384515

Janice Chiu - Tustin CA, US
Hooman Darabi - Long Beach CA, US

Broadcom Corporation - Irvine CA

G06F 7/44

327359, 455293, 455333, 327357

A receiver and receiver front end having multiple independent differential inputs, multiple independent differential low-noise amplifiers, and two sets of double-balanced IQ mixers. The double-balanced mixers include cross-coupled PMOS devices that dynamically inject current at zero-crossing points to cancel out tail currents in the mixers. Also, methods of operating the above-discussed receiver and receiver front end.

7420497, Sep 2, 2008

Jun 28, 2006

11/477271

Janice Chiu - Tustin CA, US

Broadcom Corporation - Irvine CA

H03M 1/12

341155, 341200, 330252

A quantizer is described for use in a flash analog to digital converter (ADC), which may be implemented as part of an integrated wireless transceiver or other highly integrated electrical circuit. The quantizer may be configured to operate within such a flash ADC in an accurate manner within a desired voltage range, while minimizing factors that may otherwise lead to errors in the analog-to-digital conversion process. For example, a comparator of the quantizer may be used that has properties that are particularly well-suited for such an environment, where such properties may include, for example, a relatively low input referred offset voltage that is associated with a preamplifier of the comparator.

7532055, May 12, 2009

Oct 31, 2007

11/980463

Janice Chiu - Tustin CA, US
Hooman Darabi - Long Beach CA, US

Broadcom Corporation - Irvine CA

G04F 7/44

327359, 455293, 455333, 327357

A receiver and receiver front end having multiple independent differential inputs, multiple independent differential low-noise amplifiers, and two sets of double-balanced IQ mixers. The double-balanced mixers include cross-coupled PMOS devices that dynamically inject current at zero-crossing points to cancel out tail currents in the mixers. Also, methods of operating the above-discussed receiver and receiver front end.

8466750, Jun 18, 2013

Jun 27, 2011

13/170040

Janice Chiu - Tustin CA, US
Hooman Darabi - Laguna Niguel CA, US
Tom (Qiang) Li - Irvine CA, US

Broadcom Corporation - Irvine CA

H03L 7/099
H03B 5/08

331 36C, 331176, 331177 R, 331177 V, 331117 R, 331117 FE

A technique to use an auxiliary varactor coupled to a tuning varactor, in which a temperature compensated bias signal adjusts a bias on the auxiliary varactor to maintain a voltage controlled oscillator (VCO) from drifting in frequency as operating temperature for the VCO changes.