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Israel Lesk Phones & Addresses

  • 7002 1St Ave, Scottsdale, AZ 85251
  • 6143 Exeter Blvd, Scottsdale, AZ 85251
  • Mesa, AZ
  • 1750 E Oregon Ave, Phoenix, AZ 85016
  • Tempe, AZ

Publications

Us Patents

Method Of Making Silicon Solar Cells

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US Patent:
40049493, Jan 25, 1977
Filed:
Jan 6, 1975
Appl. No.:
5/538848
Inventors:
Israel Arnold Lesk - Scottsdale AZ
Assignee:
Motorola, Inc. - Chicago IL
International Classification:
H01L 21265
US Classification:
148 15
Abstract:
Solar cells having rounded edges are provided by ion implantation of a semiconductor body having rounded edges. Individual cells can be fabricated or a continuous ribbon of semiconductor material, the ribbon having rounded edges, can be subjected to ion implantation at its surfaces and scribed to provide discrete cells.

Method For Thermally Treating A Semiconductor Substrate

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US Patent:
45472564, Oct 15, 1985
Filed:
Dec 20, 1982
Appl. No.:
6/450898
Inventors:
Richard W. Gurtler - Mesa AZ
Ronald N. Legge - Scottsdale AZ
Israel A. Lesk - Phoenix AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
C30B 104
US Classification:
156603
Abstract:
Apparatus and method are provided for thermally treating a semiconductor substrate. According to the method, the substrate is isothermally heated to an elevated temperature near the thermal treatment temperature and then is further heated to a higher temperature at which the thermal treatment occurs. Following the thermal treatment the substrate is isothermally cooled to a sufficiently low temperature to avoid thermally induced defects.

Method For Improving Crystallinity Of Semiconductor Ribbon

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US Patent:
46029800, Jul 29, 1986
Filed:
Oct 1, 1984
Appl. No.:
6/656390
Inventors:
Ralph J. Ellis - Mesa AZ
Ronald N. Legge - Scottsdale AZ
Israel A. Lesk - Phoenix AZ
Assignee:
Solavolt International - Houston TX
International Classification:
C30B 1324
US Classification:
156617R
Abstract:
A method is disclosed for improving the crystallinity of semiconductor ribbon material while increasing the material throughput and decreasing energy requirements. The crystallinity of a ribbon of semiconductor material can be improved by forming a localized molten zone in the material and sweeping this molten zone along the length of the material. As the molten zone refreezes, the material is locally recrystallized with enhanced grain size. In accordance with the invention, two ribbons are positioned back-to-back with a slight spacing between the ribbons. Energy sources are focused on the outer surfaces of the two ribbons to create a molten zone in each of the ribbons. Because of the close proximity between the ribbons, much of the energy reradiated from each molten zone is absorbed by the adjacent ribbon. The molten zones are then swept along both of the ribbons to simultaneously cause crystal improvement in both ribbons. The total energy input required for recrystallizing two ribbons is only slightly greater than the energy required to recrystallize one ribbon.

Method Of Semiconductor Solar Energy Device Fabrication

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US Patent:
41314883, Dec 26, 1978
Filed:
Apr 25, 1977
Appl. No.:
5/792438
Inventors:
Israel A. Lesk - Scottsdale AZ
Robert A. Pryor - Phoenix AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H01L 21263
H01L 3104
US Classification:
148 15
Abstract:
This disclosure relates to a semiconductor solar energy device which is of the PN-type and utilizes a dielectric anti-reflective coating on the side of the device that faces the sunlight. The fabrication techniques used in making this semiconductor device include the use of a rough or textured pyramid shaped silicon surface beneath the anti-reflective coating to increase solar cell efficiency. Also, ion implantation is used to form the PN junction in the device. The ion implanted region located on the side of the device that is subjected to the sunlight is configured in order to permit metal ohmic contact to be made thereto without shorting through the doped region during sintering of the metal contacts to the semiconductor substrate. The dielectric anti-reflective coating, in one embodiment, is a composite of silicon dioxide and silicon nitride layers. The device is designed to permit solder contacts to be made to the P and N regions thereof without possibility of shorting to semiconductor regions of opposite type conductivity.

Flat Plate Solar Collector

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US Patent:
40929779, Jun 6, 1978
Filed:
Jul 12, 1976
Appl. No.:
5/704145
Inventors:
Richard Warren Gurtler - Mesa AZ
Robert Maxwell Handy - Tempe AZ
Michael Chancey Keeling - Tempe AZ
Israel Arnold Lesk - Scottsdale AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
F24J 302
US Classification:
126270
Abstract:
A modular flat plate solar collector for fluid such as air or water includes a plurality of stacked, separable solar collector elements or sub-assemblies. Removable fastening members maintain the sub-assemblies in intimate contact with each other during operation and permit access and replacement of the sub-assemblies for repair purposes. This modular approach provides a reliable, low-cost and structurally strong unit. The use of a flow channel plate having passages with aspect ratios substantially in the range of 20 or greater further improves the performance and efficiency of the collector.

Solar Energy Collector

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US Patent:
40904954, May 23, 1978
Filed:
May 12, 1977
Appl. No.:
5/796254
Inventors:
Israel Arnold Lesk - Scottsdale AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
F24J 302
US Classification:
126270
Abstract:
A solar energy collector comprising a collector plate having a solar energy absorbing surface; a first network of intersecting walls disposed on said collector plate and forming a plurality of cavities thereon; and a second network of three-dimensional members disposed on said first network, said three-dimensional members having reflective surfaces approximately parallel to said collector plate and reflective surfaces in two other dimensions, said three-dimensional members further defining apertures in each of said cavities for admitting incident solar radiation to said cavities. The collector utilizes the absorption advantages of a black body while surpassing the emission characteristics of a selective surface.

Integrated Semiconductor Structure With Combined Dielectric And Pn Junction Isolation Including Fabrication Method Therefor

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US Patent:
40267369, May 31, 1977
Filed:
Jul 18, 1975
Appl. No.:
5/596946
Inventors:
Israel Arnold Lesk - Scottsdale AZ
Assignee:
Motorola, Inc. - Chicago IL
International Classification:
H01L 2120
US Classification:
148187
Abstract:
This disclosure is directed to an integrated semiconductor structure with combined dielectric and PN junction isolation including the fabrication method therefor wherein a compensating P type channel is formed adjacent to the dielectric side isolation across one end portion of the electrically isolated N type collector region as well as around the bottom portion of the dielectric side isolation material or layer in order to overcome the N channel inversion (in P type semiconductor material) that is formed when the dielectric isolation material is silicon dioxide. The disclosed structure is an NPN transistor device having a buried sub-collector region of N+ type conductivity and further includes a P type substrate thereby providing a PN junction isolating substrate. The silicon dioxide material or layer is used to electrically isolate the side portions of the NPN transistor device from adjacent devices. The side dielectric isolation region is formed in a substantially V-shaped configuration with polycrystalline silicon forming the material located within the dielectric V-shaped member thereby providing a substantially planar surface for the integrated semiconductor structure.

Method Of Making Dielectric And Conductive Isolated Island

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US Patent:
52683265, Dec 7, 1993
Filed:
Sep 28, 1992
Appl. No.:
7/951991
Inventors:
Israel A. Lesk - Phoenix AZ
Frank S. d'Aragona - Scottsdale AZ
Francine Y. Robb - Tempe AZ
Raymond C. Wells - Scottsdale AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H01L 2176
US Classification:
437 62
Abstract:
A dielectric and conductive isolated island is fabricated by providing an active wafer having a first and a second major surface, a doped region extending from the first surface, and a trench formed at the first surface. A conductive layer is formed on the first surface and in the trench. A planarizable layer comprised of a dielectric layer is then formed on the conductive layer. A handle wafer is bonded to the planarizable layer. The active wafer and the handle wafer are heated so that the doped region diffuses along the conductive layer to form an equalized concentration of dopant along the conductive layer which diffuses into the active wafer to form the doped region adjacent all of the conductive layer. A portion of the second surface of the active wafer is then removed so that at least a portion of the dielectric layer of the planarizable layer is exposed.
Israel Arnold Lesk from Scottsdale, AZ, age ~97 Get Report