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Igor A Tarnikov

from Palo Alto, CA
Age ~50

Igor Tarnikov Phones & Addresses

  • 290 Chestnut Ave, Palo Alto, CA 94306 (650) 327-3679
  • San Jose, CA
  • Santa Clara, CA
  • 290 Chestnut Ave, Palo Alto, CA 94306

Work

Company: Hiq solar Nov 2016 to Mar 2019 Position: Director of system development

Education

School / High School: Novosibirsk State University, Department of Economics 1991 to 1997 Specialities: Mathematics, Computer Science

Skills

Embedded Systems • Debugging • Fpga • Software Engineering • Digital Signal Processors • C++ • Hardware • Software Development • Embedded Software • Algorithms • Verilog • Multithreading • Device Drivers • Pcb Design • C • Linux • Simulations • Perl • Semiconductors • Asic • Analog • Distributed Systems • Firmware • Hardware Architecture • Software Design • Soc • Object Oriented Design • Microcontrollers

Industries

Computer Hardware

Professional Records

License Records

Igor Alexandrovich Tarnikov

Address:
290 Chestnut Ave, Palo Alto, CA 94306
License #:
A4755791
Category:
Airmen

Resumes

Resumes

Igor Tarnikov Photo 1

Senior Director, Digital Health

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Location:
Palo Alto, CA
Industry:
Computer Hardware
Work:
Hiq Solar Nov 2016 - Mar 2019
Director of System Development

Kodiak Sciences Nov 2016 - Mar 2019
Senior Director, Digital Health

Guzik Test and Measurement Sep 1997 - Nov 2016
Director of Hardware Development

Guzik Technical Enterprises Sep 1997 - Dec 2003
Software Engineer

Sibacadem Bank Apr 1996 - Aug 1997
Software Engineer
Education:
Novosibirsk State University, Department of Economics 1991 - 1997
Skills:
Embedded Systems
Debugging
Fpga
Software Engineering
Digital Signal Processors
C++
Hardware
Software Development
Embedded Software
Algorithms
Verilog
Multithreading
Device Drivers
Pcb Design
C
Linux
Simulations
Perl
Semiconductors
Asic
Analog
Distributed Systems
Firmware
Hardware Architecture
Software Design
Soc
Object Oriented Design
Microcontrollers

Publications

Us Patents

Timing Analysis Of Read Back Signals In Magnetic Recording Devices

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US Patent:
20070025004, Feb 1, 2007
Filed:
Oct 11, 2005
Appl. No.:
11/249042
Inventors:
Anatoli Stein - Atherton CA, US
Semen Volfbeyn - Milpitas CA, US
Vladislav Klimov - San Jose CA, US
Igor Tarnikov - Palo Alto CA, US
International Classification:
G11B 27/36
US Classification:
360031000
Abstract:
Analysis of a read back signal in a magnetic recording device is disclosed. The read back signal is converted to a digital read back signal, and a low frequency component of the digital read back signal is restored. A sample clock is recovered from the restored digital read back signal, and the restored digital read back signal is averaged using the recovered sample clock. A timing error is calculated based at least in part on the averaged restored digital read back signal.

Data Acquisition Device With Real Time Digital Trigger

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US Patent:
20140047198, Feb 13, 2014
Filed:
Aug 7, 2012
Appl. No.:
13/568605
Inventors:
Anatoli B. Stein - Atherton CA, US
Igor Tarnikov - Palo Alto CA, US
Valeriy Serebryanski - Sunnyvale CA, US
Assignee:
Guzik Technical Enterprises - Mountain View CA
International Classification:
G06F 12/00
H03M 13/00
US Classification:
711154, 711E12001
Abstract:
A data acquisition device incorporates a front end analog-to-digital converter (ADC), which is responsive to an applied analog input signal, sample that signal and provide digital data representative of the sampled signal. The digital data is applied to a data channel connected to a data acquisition memory, which stores data values representative of the sampled analog input signal. The digital data from the ADC is also applied to a real time a trigger channel connected to a composite function trigger equalizer and filter, a trigger processor and to a trigger memory. The trigger channel operates in real time to identify trigger events and store real-time trigger event occurrence signals in the trigger memory. A controller reads out the stored data values from the data acquisition memory by way of a data equalizer, in synchronism with corresponding real-time trigger event occurrence signals from the trigger memory.

Two-Stage Digital Down-Conversion Of Rf Pulses

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US Patent:
20160241253, Aug 18, 2016
Filed:
Jan 11, 2016
Appl. No.:
14/992364
Inventors:
- Mountain View CA, US
Anatoli B. Stein - Atherton CA, US
Lauri Viitas - Palo Alto CA, US
Igor Tarnikov - Palo Alto CA, US
International Classification:
H03M 1/12
G01S 7/35
Abstract:
A two-stage digital down-conversion device for optimal detection of varying RF pulses incorporates a front end analog to digital converter (ADC), which samples an input RF signal and performs a first stage digital down conversion in wide bandwidth by means of two digital local oscillator multipliers, low pass filters and decimators. A stream of first stage quadrature I and Q samples is analyzed by a first stage I/Q processor. The I/Q processor generates an RF pulse trigger based on a first-stage envelope signal, center frequency and frequency span data which are used for a second stage narrow band digital down-conversion. The second stage digital down-conversion is based on mixing the first stage I and Q data samples with a second stage local oscillator, further low pass filtering and decimation using a second bandwidth. A stream of second stage I/Q quadrature samples has an optimal signal to noise ratio and allows accurate estimation of RF pulse parameters (magnitude, phase and frequency) by means of a second I/Q signal processor and/or by storing second I/Q data for subsequent processing and analysis.

Method And Apparatus For Data Acquisition With Waveform Trigger

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US Patent:
20160231357, Aug 11, 2016
Filed:
Jan 11, 2016
Appl. No.:
14/992373
Inventors:
- Mountain View CA, US
Anatoli B. Stein - Atherton CA, US
Lauri Viitas - Palo Alto CA, US
Igor Tarnikov - Palo Alto CA, US
International Classification:
G01R 13/02
Abstract:
Digital signal acquisition system is triggered when an input waveform matches a known reference waveform. This is achieved by calculating a stream of error metric values defined as a sum of absolute values of differences between incoming and reference samples. An error metric is calculated using only byte operations, which is advantageous for hardware implementation. A waveform trigger is determined by a sample index corresponding to a minimum value of the error metric and corresponds to a best match between input and reference waveforms. A waveform trigger is used for synchronous averaging and estimating time domain noise voltage. A reference waveform updates in poor SNR conditions to provide robust estimates of time domain noise by reducing reference waveform jitter.

Acquisition Device With Mutlistage Digital Equalization

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US Patent:
20150349983, Dec 3, 2015
Filed:
May 29, 2015
Appl. No.:
14/725535
Inventors:
- Mountain View CA, US
Anatoli B. Stein - Atherton CA, US
Semen P. Volfbeyn - Palo Alto CA, US
Igor Tarnikov - Palo Alto CA, US
Assignee:
GUZIK TECHNICAL ENTERPRISES - Mountain View CA
International Classification:
H04L 25/03
H04L 25/06
Abstract:
An acquisition device includes an analog to digital converter (ADC) composed of multiple interleaved ADCs (sub-ADCs), which receives an analog signal which is converted to digital form. The digitized signal is processed seriatim by a pre-(or trigger-) equalizer, an acquisition memory and a post-(or memory) equalizer. In a calibration mode, frequency responses of the respective sub-ADCs are determined and trigger coefficients are determined for application to the trigger equalizer to effect a preliminary equalization of the digitized signal sufficient to permit operation of the trigger processor in an acquisition mode. Memory coefficients are determined based on residual frequency responses of the sub-ADCs, for application to the memory equalizer. A trigger processor is responsive to the trigger equalizer to select a subset of samples of the digitized signal for loading to the acquisition memory. The trigger equalizer and a memory equalizer are configured for consecutive operation so that, in an acquisition mode, the memory equalizer receives as its input, a digitized signal from the ADC that has been pre-processed in the trigger equalizer, and the memory equalizer corrects only the residue of misalignments and frequency distortions that remain after the trigger equalizer operation.
Igor A Tarnikov from Palo Alto, CA, age ~50 Get Report