Hemanth Kumar Dhavaleswarapu

20130299133, Nov 14, 2013

Dec 20, 2011

13/992439

Zhihua Li - Chandler AZ, US
Hemanth K. Dhavaleswarapu - Chandler AZ, US
Joseph B. Petrini - Gilbert AZ, US
Steven B. Roach - Chandler AZ, US
Ioan Sauciuc - Phoenix AZ, US
Pranav K. Desai - Chandler AZ, US
George S. Kostiew - Chandler AZ, US
Sanjoy K. Saha - Chandler AZ, US

B23K 37/00
H05K 3/34

165 803, 16510434

Various embodiments of thermal compression bonding transient cooling solutions are described. Those embodiments include a an array of vertically separated micro channels coupled to a heater surface, wherein every outlet micro channel comprises two adjacent inlet micro channel, and wherein an inlet and outlet manifold are coupled to the array of micro channels, and wherein the heater surface and the micro channels are coupled within the same block.

20220415770, Dec 29, 2022

Jun 23, 2021

17/356046

- Santa Clara CA, US
Sai VADLAMANI - Gilbert AZ, US
Xavier F. BRUN - Chandler AZ, US
Hemanth DHAVALESWARAPU - Tempe AZ, US

H01L 23/498
H01L 23/00
H01L 23/528
H01L 21/50
H01L 33/62
H01L 31/02

Embodiments described herein may be related to apparatuses, processes, and techniques related to multilevel dies, in particular to photonics integrated circuit dies with a thick portion and a thin portion, where the thick portion is placed within a cavity in a substrate and the thin portion serves as an overhang to physically couple with the substrate, to reduce a distance between electrical contacts on the thin portion of the die and electrical contacts on the substrate. Other embodiments may be described and/or claimed.

20210305118, Sep 30, 2021

Jun 9, 2021

17/343565

- Santa Clara CA, US
Hemanth K. Dhavaleswarapu - Tempe AZ, US
John J. Beatty - Chandler AZ, US
Syadwad Jain - Chandler AZ, US
Nachiket R. Raravikar - Gilbert AZ, US

Intel Corporation - Santa Clara CA

H01L 23/367
H01L 23/498
H01L 23/00
H01L 23/31

A microelectronic package may be fabricated to include a microelectronic substrate, at least one microelectronic device attached to the microelectronic substrate, a heat dissipation device in thermal contact with at least one microelectronic device and having at least one projection attached to the microelectronic substrate, and at least one standoff extending from the at least one projection, wherein the at least one standoff contacts the microelectronic substrate to control the bond line thickness between the heat dissipation device and at least one microelectronic device and/or to control the bond line thickness of a sealant which may be used to attached the at least one projection to the microelectronic substrate.

20200185290, Jun 11, 2020

Jun 30, 2017

16/614765

- Santa Clara CA, US
Hemanth K. DHAVALESWARAPU - Chandler AZ, US
Venkata Suresh GUTHIKONDA - Chandler AZ, US
John J. BEATTY - Chandler AZ, US
Yonghao AN - Chandler AZ, US
Marco Aurelio CARTAS AYALA - Chandler AZ, US
Luke J. GARNER - Chandler AZ, US
Peng LI - Chandler AZ, US

H01L 23/16
H01L 23/367
H01L 25/16
H01L 21/52
H01L 23/538
H01L 23/498
H01L 25/065

Semiconductor packages having a sealant bridge between an integrated heat spreader and a package substrate are described. In an embodiment, a semiconductor package includes a sealant bridge anchoring the integrated heat spreader to the package substrate at locations within an overhang gap laterally between a semiconductor die and a sidewall of the integrated heat spreader. The sealant bridge extends between a top wall of the integrated heat spreader and a die side component, such as a functional electronic component or a non-functional component, or a satellite chip on the package substrate. The sealant bridge modulates warpage or stress in thermal interface material joints to reduce thermal degradation of the semiconductor package.

20190067153, Feb 28, 2019

Aug 29, 2017

15/689463

- Santa Clara CA, US
Hemanth K. Dhavaleswarapu - Tempe AZ, US
John J. Beatty - Chandler AZ, US
Syadwad Jain - Chandler AZ, US
Nachiket R. Raravikar - Saratoga CA, US

Intel Corporation - Santa Clara CA

H01L 23/367
H01L 23/498
H01L 23/00
H01L 23/31

A microelectronic package may be fabricated to include a microelectronic substrate, at least one microelectronic device attached to the microelectronic substrate, a heat dissipation device in thermal contact with at least one microelectronic device and having at least one projection attached to the microelectronic substrate, and at least one standoff extending from the at least one projection, wherein the at least one standoff contacts the microelectronic substrate to control the bond line thickness between the heat dissipation device and at least one microelectronic device and/or to control the bond line thickness of a sealant which may be used to attached the at least one projection to the microelectronic substrate.

20190006259, Jan 3, 2019

Jun 29, 2017

15/637107

- Santa Clara CA, US
Wei Hu - Chandler AZ, US
Baris Bicen - Chandler AZ, US
Luke J. Garner - Chandler AZ, US
Hemanth Dhavaleswarapu - Chandler AZ, US

Intel Corporation - Santa Clara CA

H01L 23/367
H01L 25/065
H01L 23/00

Methods of forming microelectronic package structures/modules, and structures formed thereby, are described. Structures formed herein may include a first die disposed on a substrate and a second die disposed adjacent the first die on the substrate. A cooling solution is attached to the substrate, wherein a rib extends from a central region of the cooling solution and is attached to the substrate. The rib is disposed between the first die and the second die.

20180374776, Dec 27, 2018

Jan 11, 2016

15/774990

- Santa Clara CA, US
Hemanth K. DHAVALESWARAPU - Phoenix AZ, US
Syadwad JAIN - Chandler AZ, US

H01L 23/373
H01L 23/367
H01L 23/00
H01L 25/065
H01L 21/48

A multiple chip package is described with multiple thermal interface materials. In one example, a package has a substrate, a first semiconductor die coupled to the substrate, a second semiconductor die coupled to the substrate, a heat spreader coupled to the die, wherein the first die has a first distance to the heat spreader and the second die has a second distance to the heat spreader, a first filled thermal interface material (TIM) between the first die and the heat spreader to mechanically and thermally couple the heat spreader to the die, and a second filled TIM between the second die and the heat spreader to mechanically and thermally couple the heat spreader to the second die.

20180350712, Dec 6, 2018

May 31, 2017

15/610327

- Santa Clara CA, US
Hemanth K. Dhavaleswarapu - Chandler AZ, US
John J. Beatty - Chandler AZ, US
Sachin Deshmukh - Chandler AZ, US

INTEL CORPORATION - Santa Clara CA

H01L 23/36
H01L 23/498
H01L 21/48

A microelectronic package may be fabricated to include a microelectronic substrate, a plurality of microelectronic devices attached to the microelectronic substrate, a heat dissipation device in thermal contact with at least one of the plurality of microelectronic devices and attached to the microelectronic substrate, and at least one offset spacer attached between the microelectronic substrate and the heat dissipation device to control the bondline thickness between the heat dissipation device and at least one of the plurality of microelectronic devices.