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Gregory D Tsybulsky

from San Jose, CA
Age ~77
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Also known as:
Gregory G Tsybulsky, Gregory Y
Phone and address:
970 Summerplace Dr, San Jose, CA 95122
(408) 418-3043
Related to:
Miriam TsybulskyValentina B Tsybulsky, 76Daniel G Tsybulsky, 43Elizabeth J Tsybulsky, 44
Connected to:
Michael Tsybulsky, 45Sergey G Tsybulskiy, 57Dmitri Tsybychev, 50Andriy Tsygan, 62Aleksandr S Tsygankov, 36Tatyana S Tsykman, 48Andrey V Tsymbalyuk, 64Diana Tsymbalyuk, 60Arnold M Tsymberg, 87Boris L Tsypin, 46

Gregory Tsybulsky Phones & Addresses

  • 970 Summerplace Dr, San Jose, CA 95122 (408) 418-3043
  • 1585 La Rossa Cir, San Jose, CA 95125 (408) 297-4650
  • 216 La Rossa Cir, San Jose, CA 95125 (408) 297-4650
  • 201 Michael Dr, Campbell, CA 95008 (408) 377-2386 (408) 377-2389
  • Cupertino, CA
  • Santa Clara, CA
  • Palo Alto, CA

Work

Company: Quanta labs santa clara ca usa Mar 1, 2007 Position: Quality and facility engineer

Education

Degree: Masters

Skills

Electrical Engineering • Power Distribution • Plc • Electrical • Equipment Installation • Electricians • Engineering Management • Electrical Design • Electronics • Robotics • System Design • Semiconductors • Embedded Systems • Metrology • Algorithms • Automation

Languages

English

Industries

Research

Resumes

Resumes

Gregory Tsybulsky Photo 1

Quality And Facility Engineer

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Location:
970 Summerplace Dr, San Jose, CA 95122
Industry:
Research
Work:
Quanta Labs Santa Clara Ca Usa
Quality and Facility Engineer
Four State Technology 2005 - 2007
Electrical Engineer
Time Domain Cvd Mar 2004 - Mar 2006
Electrical Engiineer
Applied Materials Mar 1998 - Jan 2003
Senior Electrical Engineer
Okbs 1974 - 1997
Senior .Electrical Engineer
Skills:
Electrical Engineering
Power Distribution
Plc
Electrical
Equipment Installation
Electricians
Engineering Management
Electrical Design
Electronics
Robotics
System Design
Semiconductors
Embedded Systems
Metrology
Algorithms
Automation
Languages:
English

Publications

Us Patents

Method And Apparatus For Wafer Exchange Employing Stacked Robot Blades

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US Patent:
20020154975, Oct 24, 2002
Filed:
Apr 18, 2001
Appl. No.:
09/838414
Inventors:
Ilya Perlov - San Francisco CA, US
Gregory Tsybulsky - Campbell CA, US
Alexey Goder - Sunnyvale CA, US
Assignee:
Applied Materials, Inc.
International Classification:
B65G049/07
US Classification:
414/416030
Abstract:
A wafer to be processed is loaded into a processing chamber in the same operation in which a processed wafer is unloaded from the processing chamber. As part of this operation, a set of lift pins lifts the processed wafer from a processing platform. A set of storage pins is extended above the lifted wafer and defines an upper wafer transfer position. A robot arm having a stacked set of wafer handling blades is inserted into the processing chamber with a wafer to be processed on the upper blade. The storage pins may lift the wafer to be processed off the upper blade at the same time that the lift pins lower the processed wafer onto the lower blade of the robot arm. The robot arm retracts, withdrawing the processed wafer from the processing chamber. The wafer to be processed may be lowered to the processing platform by the storage pins.
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Gregory D Tsybulsky from San Jose, CA, age ~77 Get Report