Gary R Carreau

6674386, Jan 6, 2004

May 10, 2002

10/142500

Gary R. Carreau - Plaistow NH
Bruce E. Amazeen - Ipswich MA
Michael C. W. Coln - Lexington MA

Analog Devices, Inc. - Norwood MA

H03M 112

341155, 341163

A dual channel ADC uses two digital to analog converters (DACs) and a single comparator to convert two analog input channels. One DAC is used for successive approximation, while the other DAC is used for calibration. The dual channel ADC allows for sampling and conversion of single-ended, pseudo-differential, and fully differential analog input signals while maintaining layout symmetry and reducing crosstalk without substantially increasing circuit area. The single comparator is used for converting both analog input channels. Additional logic (such as switches or digital logic) is used to connect the input sampling capacitors and DACs to the appropriate inputs of the comparator for converting the analog input channels.

7167121, Jan 23, 2007

Oct 16, 2002

10/272045

Gary Carreau - Plaistow NH, US
Bruce Amazeen - Ipswich MA, US

Analog Devices, Inc. - Norwood MA

H03M 1/66

341150, 341155, 341172

A switched-capacitor circuit for use in analog-to-digital conversion samples an input signal with respect to a reference voltage, without having to generate the reference voltage, by using charge redistribution. The switched-capacitor circuit prevents the need to dissipate power while producing the reference voltage. The switched-capacitor circuit is coupled to a comparator and to a logic circuit which provides control signals for switching. The switched-capacitor circuit comprises a plurality of capacitors arranged according to several embodiments.

7218259, May 15, 2007

Nov 3, 2005

11/266071

Christopher Peter Hurrell - Cookham, GB
Gary Robert Carreau - Plaistow NH, US

Analog Devices, Inc. - Norwood MA

H03M 1/06

341118, 341120, 341150, 341161, 341163, 341172

A method of operating a digital to analog converter comprising the steps of operating the converter in a first mode to obtain a first conversion result, operating the converter in a correction mode in which one or more correction conversions are made, and wherein each correction conversion takes the result of a preceding result as a valid starting point.

7834793, Nov 16, 2010

Nov 26, 2008

12/324121

Gary Carreau - Plaistow NH, US
Bruce Amazeen - Ipswich MA, US

Analog Devices, Inc. - Norwood MA

H03M 1/12

341155, 363 20, 363129, 323222, 365193

An SAR analog-to-digital converter performs bit decisions in each of a plurality of clock cycles. A sense circuit monitors signals input to a latch within a comparator of the ADC and, when the signals are sufficient to establish a bit decision, the sense circuit terminates a currently active clock cycle causes a bit decision to occur in advance of a normal expiration of the clock cycle. If the signals are insufficient to establish a bit decision prior to a default expiration time of the clock cycle, the clock cycle concludes at the default expiration time.

7843373, Nov 30, 2010

Feb 27, 2009

12/394135

Gary Carreau - Plaistow NH, US

Analog Devices, Inc. - Norwood MA

H03M 1/12

341155, 341156, 341172

A system for randomizing aperture delay in a time interleaved ADC system that includes a plurality of selection switch stages corresponding to each of the ADCs in the system and a second selection switch stage coupled to a voltage source. A plurality of conductors extend between the second selection switch stage and each of the selection switch stages, in excess of the number of ADCs in the system. For each of N ADCs in the system, the selection switch stages and the second selection switch stage support at least N+1 selectable conductive paths extending from each of the sampling capacitors of the ADCs to the voltage source. Random selection of the N+1 paths can randomize aperture delay.

7982643, Jul 19, 2011

Nov 20, 2009

12/622928

Gary Carreau - Plaistow NH, US

Analog Devices, Inc. - Norwood MA

H03M 1/20

341131, 341155, 341156

An analog-to-digital conversion system includes an analog-to-digital converter (ADC), a plurality of receivers, each for capturing input analog signals, a multiplexer having inputs coupled to each of the receivers and an output coupled to the ADC, the multiplexer establishing a signal path between a selected one of the inputs and the output in response to an index signal, and a mux controller to supply a random sequence of index signals to the multiplexer.

8004448, Aug 23, 2011

Nov 16, 2009

12/618852

Gary Carreau - Plaistow NH, US

Analog Devices, Inc. - Norwood MA

H03M 1/12

341172, 341156

A system for converting an analog signal to a digital codeword having N bit positions that includes a dual DAC structure having a small DAC and a large DAC. At least one comparator is coupled to the small DAC and large DAC. The small DAC performs bit trials to calculate bit positions 1 to M, and the large DAC with performs bit trial calculates bit positions M+1 to N after having been set with bit decisions from the bit trials of the small DAC.

8203357, Jun 19, 2012

Dec 4, 2009

12/630999

Yoshinori Kusuda - Woburn MA, US
Michael Coln - Lexington MA, US
Gary Carreau - Plaistow NH, US

Analog Devices, Inc. - Norwood MA

H03K 17/16
H03K 19/003

326 21, 326 22, 326 26, 326 93

An integrated circuit may include a plurality of circuit sub-systems that include at least one converter circuit operating in respective critical phases and non-critical phases of operation, a clock distribution circuit that has an input for an externally-supplied clock signal that is active during the non-critical phases and inactive during the critical phases, and a clock generator to generate an internal clock signal to the converter circuit that is active when the external-supplied clock signal is inactive.