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Ethan A Mirsky

from San Francisco, CA
Age ~51

Ethan Mirsky Phones & Addresses

  • 331 12Th Ave, San Francisco, CA 94118 (415) 821-3710
  • 452 Collingwood St, San Francisco, CA 94114 (650) 966-8725
  • Palo Alto, CA
  • Cambridge, MA
  • 2250 Latham St, Mountain View, CA 94040 (650) 966-8725
  • Fairfield, CT

Work

Company: Refactored materials, inc Jul 2010 Address: San Francisco Bay Area Position: Vp operations, cfo

Education

Degree: PhD School / High School: University of California, San Francisco 2005 to 2012 Specialities: Biophysics

Industries

Biotechnology

Resumes

Resumes

Ethan Mirsky Photo 1

Vice President Strategic Projects, Chief Financial Officer

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Location:
San Francisco, CA
Industry:
Biotechnology
Work:
Refactored Materials, Inc - San Francisco Bay Area since Jul 2010
VP Operations, CFO

Refactored Materials, Inc - San Francisco since Aug 2009
Co-Founder

University of California, San Francisco 2005 - 2012
PhD Candidate

University of California, San Francisco 2004 - 2005
Research Assisant

Broadcom 2000 - 2002
Principal System Architect
Education:
University of California, San Francisco 2005 - 2012
PhD, Biophysics
Massachusetts Institute of Technology 1994 - 1996
ME, Electrical Engineering and Computer Science
Massachusetts Institute of Technology 1991 - 1996
BS, Computer Science and Engineering

Publications

Us Patents

Method And Apparatus For Controlling Contexts Of Multiple Context Processing Elements In A Network Of Multiple Context Processing Elements

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US Patent:
6457116, Sep 24, 2002
Filed:
May 28, 1999
Appl. No.:
09/322291
Inventors:
Ethan Mirsky - Mountain View CA
Robert French - Sunnyvale CA
Ian Eslick - Mountain View CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 15177
US Classification:
712 16, 326 38, 326 39, 712 15, 713100
Abstract:
A method and apparatus for providing local control of processing elements in a network of multiple context processing element are provided. A multiple context processing element is configured to store a number of configuration memory contexts. This multiple context processing element maintains data of a current configuration. State information is received from at least one other multiple context processing element. At least one configuration control signal is generated in response to the state information and the data of a current configuration. One of multiple configuration memory contexts is selected in response to the configuration control signal, the selected configuration memory context controlling the multiple context processing element. Each multiple context processing element in the networked array of multiple context processing elements has an assigned physical and virtual identification. Data is transmitted to at least one of the multiple context processing elements of the array, the data comprising control data, configuration data, an address mask, and a destination identification.

Intermediate-Grain Reconfigurable Processing Device

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US Patent:
6496918, Dec 17, 2002
Filed:
Jun 27, 2001
Appl. No.:
09/892812
Inventors:
Ethan Mirsky - Cambridge MA
Assignee:
Massachusetts Institute of Technology - Cambridge MA
International Classification:
G06F 900
US Classification:
712 15
Abstract:
A programmable integrated circuit utilizes a large number of intermediate-grain processing elements which are multibit processing units arranged in a configurable mesh. The coarse-grain resources, such as memory and processing, are deployable in a way that takes advantage of the opportunities for optimization present in given problems. To accomplish this, the interconnect supports three different modes of operation: a static value in which a value set by the configuration data is provided to a functional unit, static source in which another functional unit serves as the value source, and a dynamic source mode in which the source is determined by the value from another functional unit.

Method And Apparatus For Retiming In A Network Of Multiple Context Processing Elements

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US Patent:
6526498, Feb 25, 2003
Filed:
Feb 15, 2000
Appl. No.:
09/504203
Inventors:
Ethan Mirsky - Mountain View CA
Robert French - Sunnyvale CA
Ian Eslick - Mountain View CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 1580
US Classification:
712 11, 712 14, 712 15, 712 18, 712228, 709108, 713401
Abstract:
A method and an apparatus for retiming in a network of multiple context processing elements are provided. A programmable delay element is configured to programmably delay signals between a number of multiple context processing elements of an array without requiring a multiple context processing element to implement the delay. The output of a first multiple context processing element is coupled to a first multiplexer and to the input of a number of serially connected delay registers. The output of each of the serially connected delay registers is coupled to the input of a second multiplexer. The output of the second multiplexer is coupled to the input of the first multiplexer, and the output of the first multiplexer is coupled to a second multiple context processing element. The first and second multiplexers are provided with at least one set of data representative of at least one configuration memory context of a multiple context processing element. The first and second multiplexers are controlled to select one of a number of delay durations in response to the received set of data.

Local Control Of Multiple Context Processing Elements With Major Contexts And Minor Contexts

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US Patent:
6553479, Apr 22, 2003
Filed:
Jul 31, 2002
Appl. No.:
10/210411
Inventors:
Ethan Mirsky - Mountain View CA
Robert French - Sunnyvale CA
Ian Eslick - Mountain View CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 1577
US Classification:
712 16, 709108, 712 15, 712 20, 712229, 326 38, 326 39
Abstract:
A method and apparatus for providing local control of processing elements in a network of multiple context processing element are provided. A multiple context processing element is configured to store a number of configuration memory contexts. This multiple context processing element maintains data of a current configuration. State information is received from at least one other multiple context processing element. At least one configuration control signal is generated in responses to the state information and the data of a current configuration. One of multiple configuration memory contexts is selected in response to the configuration control signal, the selected configuration memory context controlling the multiple context processing element. Each multiple context processing element in the networked array of multiple context processing elements has an assigned physical and virtual identification. Data is transmitted to at least one of the multiple context processing elements of the array, the data comprising control data, configuration data, an address mask, and a destination identification.

Method And Apparatus For Configuring Arbitrary Sized Data Paths Comprising Multiple Context Processing Elements

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US Patent:
6591357, Jul 8, 2003
Filed:
Feb 26, 2001
Appl. No.:
09/795672
Inventors:
Ethan A. Mirsky - Mountain View CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 9315
US Classification:
712 18, 712 11, 712 14, 712223, 712221, 712224, 708209, 708625, 711219
Abstract:
A method and an apparatus for configuring arbitrary sized data paths comprising multiple context processing elements (MCPEs) are provided. Multiple MCPEs may be chained to form wider-word data paths of arbitrary widths, wherein a first ALU serves as the most significant byte (MSB) of the data path while a second ALU serves as the least significant byte (LSB) of the data path. The ALUs of the data path are coupled using a left-going, or forward, carry chain for transmitting at least one carry bit from the LSB ALU to the MSB ALU. The MSB ALU comprises configurable logic for generating at least one signal in response to a carry bit received over the left-going carry chain, the at least one signal comprising a saturation signal and a saturation value. The MCPEs of the data path use configurable logic to manipulate a resident bit sequence in response to the saturation signal transmitted thereby reconfiguring, or changing the operation of, the data path in response to he saturation signal. The carry chains support carry operations for non-local functions comprising minimum and maximum arithmetic operations.

Intermediate-Grain Reconfigurable Processing Device

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US Patent:
6684318, Jan 27, 2004
Filed:
Nov 12, 2002
Appl. No.:
10/293887
Inventors:
Ethan Mirsky - Cambridge MA
Assignee:
Massachusetts Institute of Technology - Cambridge MA
International Classification:
G06F 15177
US Classification:
712 15, 712 20
Abstract:
A programmable integrated circuit utilizes a large number of intermediate-grain processing elements which are multibit processing units arranged in a configurable mesh. The coarse-grain resources, such as memory and processing, are deployable in a way that takes advantage of the opportunities for optimization present in given problems. To accomplish this, the interconnect supports three different modes of operation: a static value in which a value set by the configuration data is provided to a functional unit, static source in which another functional unit serves as the value source, and a dynamic source mode in which the source is determined by the value from another functional unit.

Three Level Direct Communication Connections Between Neighboring Multiple Context Processing Elements

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US Patent:
6745317, Jun 1, 2004
Filed:
Jul 30, 1999
Appl. No.:
09/364838
Inventors:
Ethan Mirsky - Mountain View CA
Robert French - Sunnyvale CA
Ian Eslick - Mountain View CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 1517
US Classification:
712 11, 712 16, 712 32, 326 38, 326 39
Abstract:
A method and an apparatus for configuration of multiple context processing elements (MCPEs)are described. According to one aspect of the invention, the structure that joins the MCPE cores into a complete array in one embodiment is actually a set of several mesh-like interconnect structures. Each interconnect structure forms a network, and each network is independent in that it uses different paths, but the networks join at MCPE input switches. The network structure of one embodiment of the present invention is comprised of a local area broadcast network (level 1), a switched interconnect network (level 2), a shared bus network (level 3), and a broadcast network. In one embodiment, the level 3 network is used to carry configuration data for the MCPEs while the broadcast network is used to carry configuration data for the level 3 network drivers and switches. In one embodiment, the level 3 network is bidirectional and dynamically routable.

Local Control Of Multiple Context Processing Elements With Configuration Contexts

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US Patent:
6751722, Jun 15, 2004
Filed:
Feb 27, 2003
Appl. No.:
10/375576
Inventors:
Ethan Mirsky - Mountain View CA
Robert French - Sunnyvale CA
Ian Eslick - Mountain View CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 944
US Classification:
712 15, 709118, 712 16, 712228, 712229
Abstract:
A method and apparatus for providing local control of processing elements in a network of multiple context processing elements (MCPEs). A MCPE stores configuration memory contexts and maintains data of a current configuration. State information is received from at least one other MCPE. A configuration control signal is generated in response to the state information and current configuration data. A MCPE is selected in response to the configuration control signal to control the MCPE. Each MCPE in the networked array has an assigned physical and virtual identification. Data comprising control data, configuration data, an address mask, and a destination identification is transmitted to a MCPE. The transmitted address mask is applied to either a physical or a virtual identification, and to a destination identification. The masked physical or virtual identification is compared to the masked destination identification.
Ethan A Mirsky from San Francisco, CA, age ~51 Get Report