Yue Cue Chen

6525962, Feb 25, 2003

Apr 5, 2000

09/543462

Yue Chen - San Jose CA
Kevin Yen - Sunnyvale CA

Cypress Semiconductor Corporation - San Jose CA

G11C 1606

36518509, 36518505, 257314, 257315

An electrically erasable programmable logic device (EEPLD) cell ( ) is disclosed. A folded floating gate ( ) and folded select gate ( ) can form two parallel read current paths (Isense and Isense ). A first read current path (Isense ) may be formed between a first semiconductor region ( ) and a second semiconductor region ( - ), and may be controlled by a first floating gate portion ( - ) and a first select gate portion ( - ). A second read current path (Isense ) may be formed between the first semiconductor region ( ) and a third semiconductor region ( - ) that is coupled to a second semiconductor region ( - ). A second read current path (Isense ) may be controlled by a second floating gate portion ( - ) and a second select gate portion ( - ).

6734504, May 11, 2004

Apr 5, 2002

10/117428

James H. Lie - Santa Clara CA
Yue Chen - San Jose CA

Cypress Semiconductor Corp. - San Jose CA

H01L 2362

257355, 257356, 257357, 257360, 257361, 257546, 257786, 361 19, 361 54, 361 56, 361111, 361 911, 361 912, 361 915

A semiconductor device that includes an integrated circuit and an HBM structure formed on different semiconductor substrates is provided. The HBM structure may include input or output or input/output circuitry coupled to the integrated circuit and protection structures coupled to the input or output or input/output circuitry. In an embodiment, the integrated circuit may include input or output or input/output structures spaced across an area of the integrated circuit. The input or output or input/output circuitry of the HBM structure may be coupled to the input or output or input/output structures of the integrated circuit. A method for developing a design for an HBM structure is also provided. The method may include coupling an HBM structure formed on a first semiconductor substrate to an integrated circuit formed on a second semiconductor substrate. The method may also include testing the HBM structure and altering the HBM design based on the testing.

6775521, Aug 10, 2004

Aug 9, 2000

09/642698

Yue Chen - Santa Clara CA

Broadcom Corporation - Irvine CA

H04B 1700

455 6711, 455 6713, 455296, 4552261, 375346, 375343, 375340, 375224, 375226, 370331

A method for identifying a bad GSM speed frame and simultaneously maintaining a frame erasure rate below a specified value. The method is based upon a joint use of four signal quality metrics: (1) frame CRC parity check; (2) estimated burst signal-to-noise ratio; (3) estimated frame bit error count; and (4) stealing flag values of a frame. Another feature includes providing an improved estimated burst signal-to-noise ratio.

6845108, Jan 18, 2005

May 14, 2002

10/146653

Jian Liu - Mountain View CA, US
Yue Chen - Palo Alto CA, US
Zheng Yan - San Jose CA, US
Hong Lin - Palo Alto CA, US

Calmar Optcom, Inc. - Sunnyvale CA

H01S 310

372 20, 372 26, 372 2901, 372 2902

Techniques and designs for tunable and dynamically stabilized a laser wavelength in various lasers, including fiber lasers and actively mode-locked lasers. In an actively mode-locked laser, a dynamic wavelength tuning control and a dynamic cavity length control are implemented to maintain mode locking during tuning of the laser wavelength.

7167683, Jan 23, 2007

Jul 2, 2004

10/883867

Yue Chen - Santa Clara CA, US

Broadcom Corporation - Irvine CA

H04B 17/00

455 6711, 455 6713, 455224, 455296, 4552261, 375224, 375346, 375343, 375340, 375226, 370331, 370332, 370333

A method for identifying a bad GSM speed frame and simultaneously maintaining a frame erasure rate below a specified value. The method is based upon a joint use of four signal quality metrics: (1) frame CRC parity check; (2) estimated burst signal-to-noise ratio; (3) estimated frame bit error count; and (4) stealing flag values of a frame. Another feature includes providing an improved estimated burst signal-to-noise ratio.

7334179, Feb 19, 2008

Aug 16, 2004

10/919138

Yan Zhang - Cupertino CA, US
Paul Yang Lu - Los Altos CA, US
Yue Chen - Fremont CA, US

Broadcom Corporation - Irvine CA

G11C 29/42

714764, 714763, 714773

A method and system for ensuring data integrity in a data processing system may comprise monitoring when data for a specified device is available for error correction code generation, and receiving a first indication of the specified device, a second indication of the data, and a third indication of a size of the data during the monitoring. A new error correction code may be generated in hardware for the data based on the indicated size of the data and an indication may be provided to signal when generation of the new error correction code for a specified number of accesses for at least a portion of the data is complete. Detected errors may be corrected in software based on the newly generated error correction code. The first indication may be a device selection signal and the error correction code generation may be enabled or disabled via an enable signal.

7529297, May 5, 2009

Nov 10, 2005

11/271692

Yue Chen - Fremont CA, US
Arkady Molev-Shteiman - Bnei Barak, IL
Aric Heiman - Raanana, IL
Nelson R. Sollenberger - Farmingdale NJ, US
Huaiyu (Hanks) Zeng - Red Bank NJ, US
Baoguo Yang - San Jose CA, US

Broadcom Corporation - Irvine CA

H03H 7/30
H04B 1/10

375232, 375350

The present invention provides a multi-branch equalizer processing module operable to cancel interference associated with received radio frequency (RF) burst(s). This multi-branch equalizer processing module includes both a first equalizer processing branch and a second equalizer processing branch. The first equalizer processing branch is operable to be trained based upon known training sequences and equalize the received RF burst. This results in soft samples or decisions which in turn may be converted to data bits. The soft samples are processed with a de-interleaver and channel decoder, where the combination is operable to produce a decoded frame of data bits from the soft samples. A re-encoder may re-encode the decoded frame to produce re-encoded or at least partially re-encoded data bits. An interleaver then processes the at least partially re-encoded data bits to produce and at least partially re-encoded burst. The second equalizer processing branch uses the at least partially re-encoded data bits to train linear equalizer(s) within-the second equalizer processing branch.

7582611, Sep 1, 2009

May 2, 2006

11/416519

Yaoquan Liu - Castro Valley CA, US
Christopher Carreras - Belmont CA, US
David C. Myles - Kensington CA, US
Yong Li - Palo Alto CA, US
Simon James Shaw - San Francisco CA, US
Hong Fu - Union City CA, US
Yue Chen - Hayward CA, US
Hao Zheng - Hayward CA, US
Yandong Li - San Jose CA, US
Mark A. Burlingame - Oakland CA, US

Pfizer Inc. - New York NY

A61K 31/70
C07H 17/08

514 29, 536 72, 536 73, 536 74

Compounds having a structure according to formula (I).