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Donald Friedberg Phones & Addresses

  • Emmaus, PA
  • Allentown, PA
  • Morgan Hill, CA
  • 5970 Last Pointe Dr, Windsor, CO 80550 (610) 349-6174
  • 9736 Newtown Rd, Breinigsville, PA 18031 (610) 706-0593
  • McKinney, TX
  • San Jose, CA
  • Lake Katrine, NY

Industries

Semiconductors

Resumes

Resumes

Donald Friedberg Photo 1

Donald Friedberg

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Location:
San Jose, California
Industry:
Semiconductors

Publications

Us Patents

Automatic Clock Switching

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US Patent:
6194940, Feb 27, 2001
Filed:
Sep 27, 1999
Appl. No.:
9/406533
Inventors:
Michael James Hunter - Boyertown PA
Donald H. Friedberg - Breinigsville PA
Assignee:
Lucent Technologies Inc. - Murray Hill NJ
International Classification:
G06F 104
US Classification:
327298
Abstract:
A clock switch controller has a clock status register which stores current clock data which identifies which of two or more clock signal sources is a current clock signal source currently in use as a system clock signal source. State machine logic of the controller automatically switches, in response to a clock switch signal, the system clock signal source from the current clock signal source to a new clock signal source of the two or more clock signal sources.

Lock Detector For Phase-Locked Loop

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US Patent:
6320469, Nov 20, 2001
Filed:
Feb 15, 2000
Appl. No.:
9/504397
Inventors:
Donald H. Friedberg - Breinigsville PA
Dale Harvey Nelson - Shillington PA
Lai Q. Pham - Center Valley PA
Assignee:
Agere Systems Guardian Corp. - Orlando FL
International Classification:
H03L 7095
US Classification:
331 1A
Abstract:
A method and lock detector for detecting lock between a reference signal and a feedback signal of a PLL circuit. A number of clock cycles of the feedback signal is counted during consecutive test intervals defined by the reference signal. A feedback comparator determines whether the number of clock cycles of the feedback signal during a given test interval is within an expected range. Before lock has been indicated, a qualification counter is either incremented or reset after each test interval in accordance with the expected range determination. A lock indication signal indicating that lock has been achieved is provided if said qualification counter exceeds a qualification threshold.

Controlling Sdram Memory By Using Truncated Burst Read-Modify-Write Memory Operations

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US Patent:
59745142, Oct 26, 1999
Filed:
Nov 12, 1996
Appl. No.:
8/747320
Inventors:
J. Michael Andrewartha - Plano TX
Donald H. Friedberg - Breinigsville PA
Assignee:
Hewlett-Packard - Palo Alto CA
International Classification:
G06F 1208
US Classification:
711166
Abstract:
In a computer system having SDRAM memory banks that use a full burst read-modify-write operation as the sole mode for conducting memory operations, by selectively truncating the memory operation, it is possible to simulate either a burst read operation or a burst write operation. In a truncated read operation, a full read portion of the memory operation is performed. The tag is read with the first data line and is updated while the remaining lines of the burst are read. The tag is written using the write portion, but then the burst operation is aborted or truncated by issuing a precharge command to abort the write after the first line of the write is completed. This saves three clock periods out of a cycle of seventeen clock periods. A truncated write operation is similar to the read operation. A full burst read is started to retrieve the tag, which is stored to the first line, but the burst is truncated after the first line has been read.
Donald H Friedberg from Emmaus, PA, age ~62 Get Report