David A Figoli

7495429, Feb 24, 2009

Nov 30, 2005

11/290959

Alexander Tessarolo - Lindfield, AU
David A. Figoli - Missouri City TX, US

Texas Instruments Incorporated - Dallas TX

G01R 23/175

324 7654, 324 7635

A circuit board with a processing unit and a delay line with a controllable number of delay elements fabricated thereon includes apparatus for testing and calibrating the delay line elements. In the test mode, a calibrated pulse is delayed by the delay line while determining the logic state of pulse at two times, the interval between the two times being the same as the pulse width. By adding delay elements, the period of the calibrated pulse as a function of number of delay elements can determine the delay of each delay element. In the calibration mode, the delay line is configured as a ring oscillator and the frequency of the ring oscillator as a function of number of delay elements provides the time delay for the individual elements.

7362152, Apr 22, 2008

Mar 3, 2005

11/071027

David A. Figoli - Missouri City TX, US

Texas Instruments Incorporated - Dallas TX

H03K 3/017

327172, 327175

In a digital pulse width modulation generator unit, a phase register is coupled to the clocked counter providing the generator unit time base. In response to a control signal, the contents of the phase register over-write the present counter, thereby changing the phase of pulse width modulated generator output signal. When a plurality of pulse width modulated generator units, the phases of the units can be controlled relative to a reference generator. The contents of the phase register can be altered by hardware or by software.

20050184778, Aug 25, 2005

Aug 2, 2004

10/909886

David Figoli - Missouri City TX, US

H02M003/335

327172000

To improve the performance of a pulse width modulator, a delay line having number of delay elements receives a pulse signal from the final clock cycle prior to the generation of the trailing edge of the pulse width modulator signal. Each delay element delays the pulse signal a fraction of the system clock cycle. By controlling the number of delay elements prior to the application of the pulse to the trailing edge-generating component, the trailing edge can be adjusted by increments of the clock cycle determined by the number of delay elements. Because parameters of delay elements can vary, a technique for the calibration of the delay line circuit is disclosed.

20050242858, Nov 3, 2005

Apr 15, 2005

11/107232

David Figoli - Missouri City TX, US
Alexander Tessarolo - Lindfield NSW, AU

H03K003/017

327175000

A pulse width modulation module provides a first pulse width modulation signal and a second pulse width modulation signal, the two pulse width modulation signals having the same period, but different duty cycles. Each pulse width modulation module can be programmed to be reset by an external signal and can provide a programmable-selectable reset signal. The possible reset signals provided by the pulse width modulation module can be a signal externally applied to the pulse width modulation module, the reset signal for the first pulse signal modulation signal, and the set signal for the second pulse width modulation signal. In this manner, a pulse width modulation module can act as master or as slave modules, the pulse width modulation signal of the slave module having a selected relationship with the pulse width modulation signals of the master module.

20090167317, Jul 2, 2009

Jan 13, 2009

12/352849

Alexander Tessarolo - Lindfield, AU
David A. Figoli - Missouri City TX, US

TEXAS INSTRUMENTS INCORPORATED - Dallas TX

G01R 31/02
G01R 27/28
G01R 35/00

324537, 324617, 324555, 324601

A circuit board with a processing unit and a delay line with a controllable number of delay elements fabricated thereon includes apparatus for testing and calibrating the delay line elements. In the test mode, a calibrated pulse is delayed by the delay line while determining the logic state of pulse at two times, the interval between the two times being the same as the pulse width. By adding delay elements, the period of the calibrated pulse as a function of number of delay elements can determine the delay of each delay element. In the calibration mode, the delay line is configured as a ring oscillator and the frequency of the ring oscillator as a function of number of delay elements provides the time delay for the individual elements.

6486809, Nov 26, 2002

Jun 2, 2000

09/585771

David A. Figoli - Missouri City TX

Texas Instruments Incorporated - Dallas TX

H03M 100

341141, 341155

A digital system is provided with an Analog to Digital converter (ADC) that has a configuration that allows a programmable number of Auto conversions to occur on two separate and independent, but cascadeable, sequencers (or state machines). For each conversion state, the sequencer/s can be programmed to arbitrarily select any one of a set of muxed analog input channels. In addition, each conversion state has a unique result register in which the converted value is placed at completion of conversion. This ADC control system gives the capability to set up various forms of input signal sampling strategies. For example, one such strategy samples and converts the same channel multiple times allowing an over-sampling algorithm to be easily performed. By over sampling, increased resolution over traditional single sampled conversion systems can be obtained by suitable processing of the over-sampled results.

20190102753, Apr 4, 2019

Oct 3, 2018

16/150593

- San Antonio TX, US
David Figoli - Sugar Land TX, US

G06Q 10/00
G06Q 10/06
H04L 29/08

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for obtaining, from one or more network edge devices, operational data of one or more operational assets. Identifying, based on an analysis of the operational data, an improvement to an operational asset. Obtaining asset data associated with the operational asset, the asset data including information about the operational asset. Obtaining information related to conducting the improvement. Automatically generating, from the information related to conducting the improvement and based on the operational data, a set of options for conducting the improvement. Providing, for display on a computing device, the set of options for conducting the improvement. In response to receiving a user input indicating a selected option of the set of options, automatically initiating the improvement by sending the asset data and data indicating the selected option to a vendor to conduct the improvement.