Chu-Chen Fu

8395927, Mar 12, 2013

Jun 9, 2011

13/157208

Franz Kreupl - München, DE
Chu-Chen Fu - San Ramon CA, US
Yibo Nian - Sunnyvale CA, US

SanDisk 3D LLC - Milpitas CA

G11C 11/00

365148, 365163

A memory device in a 3-D read and write memory includes memory cells. Each memory cell includes a resistance-switching memory element (RSME) in series with a steering element. The RSME has a resistance-switching layer, a conductive intermediate layer, and first and second electrodes at either end of the RSME. A breakdown layer is electrically between, and in series with, the second electrode and the intermediate layer. The breakdown layer maintains a resistance of at least about 1-10 MΩ while in a conductive state. In a set or reset operation of the memory cell, an ionic current flows in the resistance-switching layers, contributing to a switching mechanism. An electron flow, which does not contribute to the switching mechanism, is reduced due to scattering by the conductive intermediate layer, to avoid damage to the steering element. Particular materials and combinations of materials for the different layers of the RSME are provided.

8520424, Aug 27, 2013

Jun 9, 2011

13/157204

Franz Kreupl - München, DE
Abhijit Bandyopadhyay - San Jose CA, US
Yung-Tin Chen - Santa Clara CA, US
Chu-Chen Fu - San Ramon CA, US
Wipul Pemsiri Jayasekara - Los Gatos CA, US
James Kai - Santa Clara CA, US
Raghuveer S. Makala - Sunnyvale CA, US
Peter Rabkin - Cupertino CA, US
George Samachisa - San Jose CA, US
Jingyan Zhang - Santa Clara CA, US

SanDisk 3D LLC - Milpitas CA

G11C 11/00

365148, 365158, 365163

A memory device in a 3-D read and write memory includes memory cells. Each memory cell includes a resistance-switching memory element (RSME) in series with a steering element. The RSME has first and second resistance-switching layers on either side of a conductive intermediate layer, and first and second electrodes at either end of the RSME. The first and second resistance-switching layers can both have a bipolar or unipolar switching characteristic. In a set or reset operation of the memory cell, an ionic current flows in the resistance-switching layers, contributing to a switching mechanism. An electron flow, which does not contribute to the switching mechanism, is reduced due to scattering by the conductive intermediate layer, to avoid damage to the steering element. Particular materials and combinations of materials for the different layers of the RSME are provided.

8551850, Oct 8, 2013

Dec 7, 2009

12/631913

Yubao Li - Milpitas CA, US
Chu-Chen Fu - San Ramon CA, US
Jingyan Zhang - Santa Clara CA, US

SanDisk 3D LLC - Milpitas CA

H01L 21/20

438381, 438382, 438385, 438478, 257E2109

A method of forming a reversible resistance-switching metal-insulator-metal structure is provided, the method including forming a first non-metallic conducting layer, forming a non-conducting layer above the first non-metallic conducting layer, forming a second non-metallic conducting layer above the non-conducting layer, etching the first non-metallic conducting layer, non-conducting layer and second non-metallic conducting layer to form a pillar, and disposing a carbon material layer about a sidewall of the pillar. Other aspects are also provided.

20100176366, Jul 15, 2010

Jan 14, 2009

12/320008

Chu-Chen Fu - San Ramon CA, US
Tanmay Kumar - Pleasanton CA, US
Er-Xuan Ping - Fremont CA, US
Huiwan Xu - Sunnyvale CA, US

H01L 45/00
H01L 21/308

257 4, 438694, 438699, 257E21294, 257E45002

A nonvolatile memory cell includes a storage element, the storage element comprising a carbon material, a steering element located in series with the storage element, and a metal silicide layer located adjacent to the carbon material. A method of making a device includes forming a metal silicide over a silicon layer, forming a carbon layer over the metal silicide layer, forming a barrier layer over the carbon layer, and patterning the carbon layer, the metal silicide layer, and the silicon layer to form an array of pillars.

20110227026, Sep 22, 2011

Nov 9, 2010

12/942575

Deepak C. Sekar - Sunnyvale CA, US
Franz Kreupl - Mountain View CA, US
Raghuveer Makala - Milpitas CA, US
Peter Rabkin - Cupertino CA, US
Chu-Chen Fu - San Ramon CA, US
Tong Zhang - Milpitas CA, US

H01L 47/00
H01L 21/00

257 4, 438104, 257E21001, 257E47001

Non-volatile storage elements having a reversible resistivity-switching element and techniques for fabricating the same are disclosed herein. The reversible resistivity-switching element may be formed by depositing an oxygen diffusion resistant material (e.g., heavily doped Si, W, WN) over the top electrode. A trap passivation material (e.g., fluorine, nitrogen, hydrogen, deuterium) may be incorporated into one or more of the bottom electrode, a metal oxide region, or the top electrode of the reversible resistivity-switching element. One embodiment includes a reversible resistivity-switching element having a bi-layer capping layer between the metal oxide and the top electrode. Fabricating the device may include depositing (un-reacted) titanium and depositing titanium oxide in situ without air brake. One embodiment includes incorporating titanium into the metal oxide of the reversible resistivity-switching element. The titanium might be implanted into the metal oxide while depositing the metal oxide, or after deposition of the metal oxide. Sub-plantation may be used to create a titanium region between two metal oxide regions.

20130075685, Mar 28, 2013

Sep 22, 2011

13/241098

Yubao Li - San Jose CA, US
Chu-Chen Fu - San Ramon CA, US

H01L 47/00
H01L 45/00
B82Y 10/00
B82Y 40/00

257 3, 438382, 257E47001, 257E45001, 977943, 977842

In some aspects, a reversible resistance-switching metal-insulator-metal stack is provided that includes a first conducting layer, a carbon nano-tube (“CNT”) material above the first conducting layer, a second conducting layer above the CNT material, and an air gap between the first conducting layer and the CNT material. Numerous other aspects are provided.

20130234099, Sep 12, 2013

Mar 21, 2013

13/848603

Franz Kreupl - Mountain View CA, US
Raghuveer S. Makala - Milpitas CA, US
Peter Rabkin - Cupertino CA, US
Chu-Chen Fu - San Ramon CA, US
Tong Zhang - Milpitas CA, US

SANDISK 3D LLC - Milpitas CA

H01L 45/00

257 4, 438381

Non-volatile storage elements having a reversible resistivity-switching element and techniques for fabricating the same are disclosed herein. The reversible resistivity-switching element may be formed by depositing an oxygen diffusion resistant material (e.g., heavily doped Si, W, WN) over the top electrode. A trap passivation material (e.g., fluorine, nitrogen, hydrogen, deuterium) may be incorporated into one or more of the bottom electrode, a metal oxide region, or the top electrode of the reversible resistivity-switching element. One embodiment includes a reversible resistivity-switching element having a bi-layer capping layer between the metal oxide and the top electrode. Fabricating the device may include depositing (un-reacted) titanium and depositing titanium oxide in situ without air break. One embodiment includes incorporating titanium into the metal oxide of the reversible resistivity-switching element. The titanium might be implanted into the metal oxide while depositing the metal oxide, or after deposition of the metal oxide.

20220199686, Jun 23, 2022

Mar 14, 2022

17/654768

- ADDISON TX, US
Jordan KATINE - Mountain View CA, US
Tsai-Wei WU - San Jose CA, US
Chu-Chen FU - San Ramon CA, US

H01L 27/22
H01L 43/12
H01L 43/02

A memory device includes a cross-point array of magnetoresistive memory cells. Each magnetoresistive memory cell includes a vertical stack of a selector-containing pillar structure and a magnetic tunnel junction pillar structure. The lateral spacing between neighboring pairs of magnetoresistive memory cells may be smaller along a first horizontal direction than along a second horizontal direction, and a dielectric spacer or a tapered etch process may be used to provide a pattern of an etch mask for patterning first electrically conductive lines underneath the magnetoresistive memory cells. Alternatively, a resist layer may be employed to pattern first electrically conductive lines underneath the cross-point array. Alternatively, a protective dielectric liner may be provided to protect selector-containing pillar structures during formation of the magnetic tunnel junction pillar structures.