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Bryan T Shepardson

from Durham, NC
Age ~42
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Also known as:
Brian Shepardson
Related to:
Christine R Shepardson, 71Michael J Shepardson, 38David A Shepardson, 74Carol J Shepardson, 74Jon E Shepardson, 77Scott A Shepardson, 39Ann M Shepardson, 40Kelly M Shepardson, 37Jason D Shepardson, 45Ann M Shepardson, 69
Connected to:
Alan A Shepard, 62Albert A Shepard, 49Allan H Shepard, 82Alma W Shepard, 76Ambrosia C Shepard, 37Anthony J Shepardson, 54Benny R Shepard, 69Bianca Shepard, 31Bobbette S Shepard, 75Brandon J Shepard, 44

Bryan Shepardson Phones & Addresses

  • Durham, NC
  • 412 3Rd St, Liverpool, NY 13088
  • 40 Main St, Dundee, NY 14837 (607) 243-7449
  • Potsdam, NY

Resumes

Resumes

Bryan Shepardson Photo 1

Manager, Systems And Software

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Location:
Liverpool, NY
Industry:
Biotechnology
Work:
Pall Corporation Jul 2017 - May 2019
Senior Project Engineer
Pall Corporation Jul 2017 - May 2019
Manager, Systems and Software
C Speed, Llc Apr 1, 2006 - Jul 2017
Project Manager and Technical Lead
Saab Sensis Corporation Jun 2004 - Mar 2006
Hardware Engineer
Education:
Clarkson University 2000 - 2004
Bachelors, Bachelor of Science, Computer Engineering
Skills:
Testing
C++
Embedded Systems
Fpga
Embedded Software
Integration
Software Development
Requirements Analysis
Field Programmable Gate Arrays
Xilinx
Systems Engineering
Electronics
Engineering Management
C
Systems Design
Project Management
Vhdl
Verilog
Software Engineering
System Architecture
Debugging
Hardware Architecture
Bryan Shepardson Photo 2

Bryan Shepardson

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Publications

Us Patents

Data Acquisition System For Test And Measurement Signals

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US Patent:
8305903, Nov 6, 2012
Filed:
Mar 31, 2008
Appl. No.:
12/079973
Inventors:
Justin Ralph Louise - Jamesville NY, US
Kevin Roy Francis - Liverpool NY, US
Brian David Harry - Baldwinsville NY, US
Bryan Thomas Shepardson - Liverpool NY, US
Assignee:
C Speed, LLC - Liverpool NY
International Classification:
H04J 3/14
US Classification:
370241, 370247, 370251
Abstract:
A system having an acquisition device for acquiring test and measurement data and providing such data to a computer system for display of such data. For each input data signal, the acquisition device has two differential receivers of opposite polarity each having an output coupled to the input of different ones of two pairs of registers, resulting in four registers sampling the input data signal periodically at four different times in accordance with two clocking signals of different phase (phase shifted 90) to provide a sampling rate four times the rate of the clocking signals. The resulting sample data is stored in memory of the acquisition device along with downsampled data representing a compressed, low resolution, version of the sample data which records toggling in the sample data notwithstanding such downsampling. The computer system can request readout of stored sample data and/or downsampled data during or after acquisition of sample data and downsampled data. The acquisition device preferably utilizes an FPGA to provide sampling, storage and readout of data stored in memory of the device.

Data Acquisition System For Test And Measurement Signals

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US Patent:
20130096882, Apr 18, 2013
Filed:
Sep 14, 2012
Appl. No.:
13/618770
Inventors:
JUSTIN RALPH LOUISE - JAMESVILLE NY, US
KEVIN ROY FRANCIS - LIVERPOOL NY, US
BRIAN DAVID HARRY - BALDWINSVILLE NY, US
BRYAN THOMAS SHEPARDSON - LIVERPOOL NY, US
Assignee:
C SPEED, LLC - LIVERPOOL NY
International Classification:
G06F 15/00
US Classification:
702189
Abstract:
A system having an acquisition device for acquiring test and measurement data. For each input data signal, the acquisition device has two differential receivers of opposite polarity each having an output coupled to the input of different ones of two pairs of registers, resulting in four registers sampling the input data signal periodically at four different times in accordance with two clocking signals of different phase (phase shifted) 90 to provide a sampling rate four times the rate of the clocking signals. The resulting sample data is stored in memory along with downsampled data. A computer system can request readout of stored sample data and/or downsampled data during or after acquisition of sample data and downsampled data. The acquisition device preferably utilizes an FPGA to provide sampling, storage and readout of stored data. The FPGA may be reconfigurable to provide one of different data acquiring modes selectable by a user.
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Bryan T Shepardson from Durham, NC, age ~42 Get Report