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Brendan D Donahe

from Jonestown, TX
Age ~50
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Also known as:
Bredan D Donahe
Phone and address:
7811 Ladera Trl, Leander, TX 78645
(512) 913-2326
Related to:
Sherry Ochoa Donahe, 52Robun Strauss, 49Leonard D Donahe, 80Louise M Donahe, 77Oskar H Strauss, 77Joann E Strauss, 76Robin M Strauss, 49Rita J Strauss, 80Wayne StraussErika L Castaneda, 52
Connected to:
Emily N Donahee, 38Patrick A Donaher, 49Landon H Donahey, 63Barbara A Donaho, 82Chip Donaho, 76John Donaho, 38Mark A Donaho, 35Briana M Donahoe, 43Catherine J Donahoe, 74Chandra J Donahoe, 52

Brendan Donahe Phones & Addresses

  • 7811 Ladera Trl, Leander, TX 78645 (512) 913-2326
  • 8014 Ladera Trl, Leander, TX 78645
  • 18900 Old Burnet Rd, Leander, TX 78645
  • 19100 Old Burnet Rd, Leander, TX 78645
  • Jonestown, TX
  • Las Cruces, NM
  • 7700 Capital Of Texas Hwy, Austin, TX 78731 (512) 342-2198 (512) 418-0560

Work

Company: Nvidia Jun 2011 Address: Austin, Texas Area Position: Senior staff verification engineer

Education

School / High School: New Mexico State University 1992 to 1997

Skills

Debugging • Verilog • Systemverilog • Functional Verification • Asic • Microprocessors • Semiconductors • Soc • Computer Architecture • Hardware Architecture • Processors • Integrated Circuit Design • Rtl Design • Arm • Uvm • System on A Chip • Application Specific Integrated Circuits • Arm Architecture • Open Verification Methodology • Ic • Integrated Circuits

Industries

Semiconductors

Resumes

Resumes

Brendan Donahe Photo 1

Verification Architect

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Location:
19100 Old Burnet Rd, Jonestown, TX 78645
Industry:
Semiconductors
Work:
NVIDIA - Austin, Texas Area since Jun 2011
Senior Staff Verification Engineer
NetLogic Microsystems/RMI Corporation Aug 2006 - Jun 2011
Staff Verification Engineer
Metta Technology Jun 2005 - Jul 2006
Staff Verification Engineer
Conexant Systems, Inc. Jul 2003 - Jun 2005
Verification Engineer
Conexant Systems, Inc. Mar 2002 - Jul 2003
Software Engineer
Education:
New Mexico State University 1992 - 1997
Skills:
Debugging
Verilog
Systemverilog
Functional Verification
Asic
Microprocessors
Semiconductors
Soc
Computer Architecture
Hardware Architecture
Processors
Integrated Circuit Design
Rtl Design
Arm
Uvm
System on A Chip
Application Specific Integrated Circuits
Arm Architecture
Open Verification Methodology
Ic
Integrated Circuits

Publications

Us Patents

System, Method And Device To Encode And Decode Video Data Having Multiple Video Data Formats

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US Patent:
8462841, Jun 11, 2013
Filed:
Dec 31, 2007
Appl. No.:
11/967690
Inventors:
Erik Schlanger - Austin TX, US
Brendan Donahe - Lago Vista TX, US
Eric Devolder - Cedar Park TX, US
Rens Ross - Austin TX, US
Sandip Ladhani - Austin TX, US
Eric Swartzendruber - Round Rock TX, US
Assignee:
NetLogic Microsystems, Inc. - Irvine CA
International Classification:
G06K 9/46
US Classification:
375240, 382234
Abstract:
A video processing device () includes a bitstream accelerator module () and a video processing engine (). The bitstream accelerator module () has an input for receiving a stream of encoded video data, and an output adapted to be coupled to a memory () for storing partially decoded video data. The bitstream accelerator module () partially decodes the stream of encoded video data according to a selected one of a plurality of video formats to provide the partially decoded video data. The video processing engine () has input adapted to be coupled to the memory () for reading the partially decoded video data, and an output for providing decoded video data.

Method And Device Of Processing Video

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US Patent:
20100053181, Mar 4, 2010
Filed:
Aug 31, 2008
Appl. No.:
12/202285
Inventors:
Erik M. Schlanger - Austin TX, US
Brendan D. Donahe - Lago Vista TX, US
Assignee:
RAZA MICROELECTRONICS, INC. - Cupertino CA
International Classification:
G09G 5/39
US Classification:
345531, 37524024
Abstract:
A memory controller is disclosed that allocates local memory space to a set of macroblocks of a picture being processed. Information associated with a specific macroblock of the set of macroblocks is written to non-local memory when it is no longer needed to complete processing of a current row of macroblocks. When information associated with the specific macroblock is later needed to process a different row of macroblocks, the memory controller allocates local memory space to the specific macroblock and stores the previously saved information from non-local memory to the local memory.

Method And Device For Reordering Video Information

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US Patent:
20100054339, Mar 4, 2010
Filed:
Aug 31, 2008
Appl. No.:
12/202293
Inventors:
Erik M. Schlanger - Austin TX, US
Brendan D. Donahe - Lago Vista TX, US
Eric Swartzendruber - Round Rock TX, US
Eric J. DeVolder - Cedar Park TX, US
Assignee:
RAZA MICROELECTRONICS, INC. - Cupertino CA
International Classification:
H04N 7/24
US Classification:
37524025, 375E0702
Abstract:
A method and device that allow picture slices of a video stream to be processed in an order different than the order they were received is disclosed. Information mapping the location of picture slices that are stored in the order they were received is stored to allow subsequent processing to access the picture slice in any order, including render order.

Device For Decoding A Video Stream And Method Thereof

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US Patent:
20100111166, May 6, 2010
Filed:
Oct 31, 2008
Appl. No.:
12/262211
Inventors:
Erik M. Schlanger - Austin TX, US
Brendan D. Donahe - Lago Vista TX, US
Eric Swartzendruber - Round Rock TX, US
Sandip J. Ladhani - Austin TX, US
Assignee:
RMI CORPORATION - Cupertino CA
International Classification:
H04N 7/32
US Classification:
37524012, 375E07125
Abstract:
A device is disclosed having a motion vector processing module to determine a first set of motion vectors associated with a macroblock of a video picture. A motion vector reduction module determines a second set of motion vectors, based on the first set of motion vectors, associated the macroblock, the second set having fewer motion vectors than the first set. A decode module comprising an input completes decoding of the macroblock based upon the second set of motion vectors

Method And Device For Reordering Video Information

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US Patent:
20130070849, Mar 21, 2013
Filed:
Sep 14, 2012
Appl. No.:
13/620190
Inventors:
Erik M. SCHLANGER - Austin TX, US
Brendan D. Donahe - Lago Vista TX, US
Eric Swartzendruber - Round Rock TX, US
Eric J. DeVolder - Cedar Park TX, US
Assignee:
NetLogic Microsystems, Inc. - Irvine CA
International Classification:
H04N 7/32
US Classification:
37524012
Abstract:
A method and device that allow picture slices of a Video stream to be processed in an order different than the order they were received is disclosed. Information mapping the location of picture slices that are stored in the order they were received is stored to allow subsequent processing to access the picture slice in any order, including render order.
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Brendan D Donahe from Jonestown, TX, age ~50 Get Report