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Brant R Gourley

from Eagan, MN
Age ~57
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Also known as:
Brant C Gourley, Brant R Gurley, Brant Giombetti, Russell Gourley Brant
Related to:
Ross D Vanderwerf, 47Tod J Moriarty, 59T Moriarty, 59Jacob M Gourley, 28Christine L Gourley, 62Christine Gourley
Connected to:
Adrienne M Gourley, 43Alaina D Gourley, 42Alicia K Gourley, 58April B Gourley, 40Betty Gourley, 46Bob A Gourley, 78Bobby L Gourley, 50Brent M Gourley, 36Carrie L Gourley, 61Denny L Gourley, 60

Brant Gourley Phones & Addresses

  • Eagan, MN
  • Santa Clara, CA
  • Des Moines, IA
  • Minneapolis, MN
  • Phoenix, AZ

Work

Company: Unitedhealth group Mar 2017 to Feb 2018 Position: Assoc director business process

Education

Degree: Master of Business Administration, Masters School / High School: University of St. Thomas 1998 to 2005 Specialities: Management

Skills

Cross Functional Team Leadership • Six Sigma • Project Management • Product Development • Team Building • Process Improvement • Management • Program Management • Pmp • Integration • Medical Devices • Healthcare • Leadership • Strategy • Design of Experiments • Performance Management • Design Thinking • Semiconductor Industry • R&D • Engineering Management • Engineering • Process Engineering • Continuous Improvement • Quality Management • Strategic Planning • Electrical Engineering • Integrated Circuit Design • Systems Engineering • Stakeholder Management • Dmaic • Product Management • Fda • Product Launch • Requirements Management • Mba • Healthcare Information Technology • Project Portfolio Management • Business Process Improvement • Microsoft Project • Root Cause Analysis • Team Leadership • Manufacturing • Data Analysis • Hospitals • Strategic Partnerships • Start Up Ventures • Proje • Dfss • Sta

Ranks

Certificate: License 1469735

Interests

Health

Industries

Hospital & Health Care

Resumes

Resumes

Brant Gourley Photo 1

Brant Gourley

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Location:
Minneapolis, MN
Industry:
Hospital & Health Care
Work:
Unitedhealth Group Mar 2017 - Feb 2018
Assoc Director Business Process
Mayo Clinic May 2011 - Mar 2017
Senior Project Manager, Center For Innovation
Medtronic 2006 - 2011
Engineering Manager
Medtronic 1999 - 2006
Lead Engineer
Vtc 1994 - 1999
Project Leader
Education:
University of St. Thomas 1998 - 2005
Master of Business Administration, Masters, Management Devry University 1987 - 1990
Bachelors, Bachelor of Science, Electronics Engineering
Skills:
Cross Functional Team Leadership
Six Sigma
Project Management
Product Development
Team Building
Process Improvement
Management
Program Management
Pmp
Integration
Medical Devices
Healthcare
Leadership
Strategy
Design of Experiments
Performance Management
Design Thinking
Semiconductor Industry
R&D
Engineering Management
Engineering
Process Engineering
Continuous Improvement
Quality Management
Strategic Planning
Electrical Engineering
Integrated Circuit Design
Systems Engineering
Stakeholder Management
Dmaic
Product Management
Fda
Product Launch
Requirements Management
Mba
Healthcare Information Technology
Project Portfolio Management
Business Process Improvement
Microsoft Project
Root Cause Analysis
Team Leadership
Manufacturing
Data Analysis
Hospitals
Strategic Partnerships
Start Up Ventures
Proje
Dfss
Sta
Interests:
Health
Certifications:
License 1469735
Sig Sigma Green Belt (Dfss), Drm, Lean
Agile Development
Human-Centered Design
Usa Track and Field (Usatf) Level 1 Certified Track and Field Coach
Pmi, License 1469735
Project Management Professional (Pmp)

Publications

Us Patents

Standardized Test Board For Testing Custom Chips

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US Patent:
20020001179, Jan 3, 2002
Filed:
Oct 4, 1999
Appl. No.:
09/412089
Inventors:
EARL E. WENTZEL - MINNEAPOLIS MN, US
BRANT R. GOURLEY - EAGAN MN, US
GREGORY A. KING - LAKEVILLE MN, US
PAUL F. CISEWSKI - BROOKLYN PARK MN, US
STEVEN V. STANG - INVER GROVE HEIGHTS MN, US
GREGORY P. MICKO - COTTAGE GROVE MN, US
BRIAN J. SANDVOLD - BLAINE MN, US
International Classification:
H05K007/20
US Classification:
361/704000
Abstract:
A printed wiring board provides connection between a chip and a standard footprint layout of a test machine. An insulating substrate defines a chip receiving region having a plurality of chip connector pads on one side of the substrate for connection to bump contacts of custom integrated circuit chips. A plurality of layout connectors are in a layout connection region of the board and arranged in the standard footprint layout. Circuit traces provide electrical connection between the chip connectors and the layout connectors, and a solder stop on the substrate extends over the circuit traces between the chip receiving region and the layout connection region. A plurality of plated apertures extend through the substrate in the chip receiving region to a thermally conductive heat sink opposite the chip connectors. In use, a chip is mounted to the board in the chip receiving region and connected to the chip connectors to rigidly mount the chip to the board. A thermally conductive paste extends through the apertures to thermally connect the chip to the heat sink. The solder stop prevents solder connecting the chip to the chip connectors from wicking along the traces thereby preventing deformation of the bump contacts.
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Brant R Gourley from Eagan, MN, age ~57 Get Report