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Azita S Ashe

from Saratoga, CA
Age ~59
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Also known as:
Azita Soroushian, Ashe Azita Soroushian, Ashe Azlta Soroushian, Ashe James Soroushian, Azita E, Soroushian Azita
Phone and address:
19797 Merribrook Dr, Saratoga, CA 95070
(408) 867-5163
Related to:
Esfandiar SoroushianJames J Ashe, 65Ladan Soroushian, 56Annahita A Ashe, 30Sean K Ashe, 32
Connected to:
Alice F Ashe, 64Brenda M Ashe, 43Cathy L Ashe, 67Chelsea T Ashe, 31Claire J Ashe, 93Claire Ashe, 49Clarence A Ashe, 49Cynthia Ashe, 68Daniel A Ashe, 67Davonne A Ashe, 41

Azita Ashe Phones & Addresses

  • 19797 Merribrook Dr, Saratoga, CA 95070 (408) 867-5163
  • Carmel by the Sea, CA
  • San Jose, CA
  • Sunnyvale, CA
  • 19797 Merribrook Dr, Saratoga, CA 95070

Work

Position: Professional/Technical

Education

Degree: Graduate or professional degree

Publications

Us Patents

Digital-To-Analog Converter With Cmos-Compatible Power-On Reset Circuit

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US Patent:
62921231, Sep 18, 2001
Filed:
Dec 21, 2000
Appl. No.:
9/746794
Inventors:
Derek F. Bowers - Sunnyvale CA
Azita Ashe - Saratoga CA
Assignee:
Analog Devices, Inc. - Norwood MA
International Classification:
H03M 166
US Classification:
341144
Abstract:
A power-on reset circuit employs all-CMOS circuitry to initiate a reset signal when the circuit's power supply voltage is low, and terminate the signal in response to the supply voltage exceeding a reference voltage by at least the greater of the threshold voltages of PFET and NFET transistors employed in the circuit. A diode-connected bipolar transistor is implemented with an FET-compatible circuit structure to establish the reference voltage, which compensates for the possibility of fabrication tolerances.

Cmos-Compatible Power-On Reset Circuit

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US Patent:
62396307, May 29, 2001
Filed:
Jul 23, 1999
Appl. No.:
9/359512
Inventors:
Derek F. Bowers - Sunnyvale CA
Azita Ashe - Saratoga CA
International Classification:
H03L 700
US Classification:
327143
Abstract:
A power-on reset circuit employs all-CMOS circuitry to initiate a reset signal when the circuit's power supply voltage is low, and terminate the signal in response to the supply voltage exceeding a reference voltage by at least the greater of the threshold voltages of PFET and NFET transistors employed in the circuit. A diode-connected bipolar transistor is implemented with an FET-compatible circuit structure to establish the reference voltage, which compensates for the possibility of fabrication tolerances.
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Azita S Ashe from Saratoga, CA, age ~59 Get Report