US Patent:
20040230408, Nov 18, 2004
Inventors:
David Colleran - San Mateo CA, US
Arrash Hassibi - Menlo Park CA, US
International Classification:
G06F017/10
Abstract:
A method is described that involves developing a more detailed description of a phase lock loop system by substituting, into a monomial or posynomial equation that is part of a family of monomial and posynomial expressions that describe functional characteristics of the PLL at the system level, a lower level expression that describes a characteristic of one the PLL's basic building blocks.