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Amanda G Noe

from Allen, TX
Age ~59

Amanda Noe Phones & Addresses

  • 4307 Springhill Estates Dr, Allen, TX 75002 (972) 422-7698
  • Parker, TX
  • Austin, TX
  • Netawaka, KS
  • 2901 Val Verde Dr, Plano, TX 75025 (972) 423-7859 (972) 491-1491
  • Dallas, TX
  • 4307 Springhill Estates Dr, Allen, TX 75002 (972) 491-1491

Work

Position: Construction and Extraction Occupations

Education

Degree: High school graduate or higher

Emails

Resumes

Resumes

Amanda Noe Photo 1

High Speed Specialist Fae, Sr. Staff At Altera Corporation

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Position:
High Speed Technology Specialist FAE, Sr. Staff at Altera, High Speed Specialist FAE, Sr. Staff at Altera Corporation
Location:
Dallas/Fort Worth Area
Industry:
Semiconductors
Work:
Altera since Apr 1996
High Speed Technology Specialist FAE, Sr. Staff

Altera Corporation - 3400 Waterview Parkway, Suite 300 Richardson, TX 75080 since Apr 1996
High Speed Specialist FAE, Sr. Staff

DSC Communications - 1000 Coit Road Plano, TX 75075 Mar 1993 - Apr 1996
Electrical Hardware Design Engineer

Texas Instruments - Lewisville, TX Jul 1988 - Mar 1993
Electrical Hardware Design Engineer
Education:
Marquette University
BSEE, Electrical Engineering
Amanda Noe Photo 2

Amanda Noe

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Location:
United States

Publications

Us Patents

Distributed Digital Cross-Connect System And Method

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US Patent:
7110353, Sep 19, 2006
Filed:
Feb 20, 2001
Appl. No.:
09/790077
Inventors:
Stephen A. Deschaine - Garland TX, US
Mark C. Cromwell - Plano TX, US
Gregory S. Lovelace - Sachse TX, US
Becky J. Sampson - Garland TX, US
Michael H. Jette - Grapevine TX, US
Dennis K. Smith - Colleyville TX, US
William A. Moffit - Rowlett TX, US
Steven D. Sensel - Blue Ridge TX, US
Edgar L. Read - Plano TX, US
Amanda G. Noe - Plano TX, US
Assignee:
Alcatel USA Sourcing, L.P. - Plano TX
International Classification:
H04L 12/54
US Classification:
370219, 370220
Abstract:
A distributed digital cross-connect system () is provided. The system includes two or more network interface islands () that connect to the telecommunications network. The system () also includes one or more distributed services nodes (). Each distributed services node () connects to two or more of the network interface islands (). The network interface islands () can transmit data to each other through the distributed services node (). An administration system () is also connected to each distributed services node () and each network interface island (). The administration system () transmits matrix configuration and telecommunications channel routing data to the network interface islands () and the distributed services nodes ().

Pattern Detect And Byte Align Circuit Using Cam

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US Patent:
7373454, May 13, 2008
Filed:
Oct 28, 2003
Appl. No.:
10/695976
Inventors:
Amanda Noe - Plano TX, US
Assignee:
Altera Corporation - San Jose CA
International Classification:
G06F 12/00
US Classification:
711108
Abstract:
A method detects a programmable pattern (e. g. , Ethernet comma or SONET A1A2 frame) and simultaneously byte aligns to that pattern. The technique uses a content addressable memory (CAM) programmed (e. g. , selected by the user) with a particular pattern to enable detecting of a symbol or symbols, or pattern, of bits in an incoming serial stream. The circuitry deserializes the serial stream and byte aligns parallel data based on output from the CAM and a state machine.

Circuitry For Retiming A Received Data Signal

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US Patent:
59303115, Jul 27, 1999
Filed:
Oct 10, 1996
Appl. No.:
8/731154
Inventors:
Gregory S. Lovelace - Sachse TX
Amanda G. Noe - Plano TX
David M. Smith - Plano TX
Assignee:
Alcatel USA Sourcing, L.P. - Plano TX
International Classification:
H04L 700
US Classification:
375354
Abstract:
A circuitry (10) is provided for automatically retiming a received synchronous data signal to a local clock. The circuitry (10) includes a first flip-flop (20) operable to register at least one synchronous data signal in response to a receive clock signal and to generate at least one data output signal. An OR gate (26) receives a data latch enable signal and a local clock signal. The local clock signal is frequency coherent with the receive clock signal. The OR gate (26) produces an enable signal. A latch (28) is coupled to the OR gate (26) for receiving the enable signal and in cascading arrangement with the first flip-flop (20). The latch (28) latches the data output signal on the falling edge of the local clock signal when the data latch enable signal is low. The latch (28) holds the latched data output signal as long as the local clock signal and the data latch enable signal are low. When either the local clock signal or the data latch enable signal is high, the latch (28) passes the data output signal.

Distributed Digital Cross-Connect System And Method

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US Patent:
61987204, Mar 6, 2001
Filed:
Dec 26, 1996
Appl. No.:
8/774155
Inventors:
Stephen A. Deschaine - Garland TX
Mark C. Cromwell - Plano TX
Gregory S. Lovelace - Sachse TX
Becky J. Sampson - Garland TX
Michael H. Jette - Grapevine TX
Dennis K. Smith - Colleyville TX
William A. Moffit - Rowlett TX
Steven D. Sensel - Blue Ridge TX
Edgar L. Read - Plano TX
Amanda G. Noe - Plano TX
Assignee:
Alcatel USA Sourcing, L.P. - Plano TX
International Classification:
H04L 1264
US Classification:
370220
Abstract:
A distributed digital cross-connect system (10) is provided. The system includes two or more network interface islands (12) that connect to the telecommunications network. The system (10) also includes one or more distributed services nodes (18). Each distributed services node (18) connects to two or more of the network interface islands (12). The network interface islands (12) can transmit data to each other through the distributed services node (18). An administration system (14) is also connected to each distributed services node (18) and each network interface island (12). The administration system (14) transmits matrix configuration and telecommunications channel routing data to the network interface islands (12) and the distributed services nodes (18).

System And Method For Controlling Timing In A Distributed Digital Cross-Connect System

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US Patent:
59011360, May 4, 1999
Filed:
Dec 26, 1996
Appl. No.:
8/774156
Inventors:
Gregory S. Lovelace - Sachse TX
Michael H. Jette - Grapevine TX
Steven D. Sensel - Blue Ridge TX
Edgar L. Read - Plano TX
Amanda G. Noe - Plano TX
Assignee:
Alcatel USA Sourcing, L.P. - Plano TX
International Classification:
H04Q 1104
H04J 322
H04L 1264
US Classification:
370217
Abstract:
A timing system (100) for coordinating the components of a distributed digital cross-connect system (10) is provided. The timing system (100) includes a master timing system (102) that receives a network timing reference (98, 99) and generates a master timing signal. A distributed services node timing system (104, 106) is connected to the master timing system (102) and receives the master timing signal. The distributed services node timing system (104, 106) then embeds a timing signal in a data transmission frame (150). Two or more digital cross-connect timing systems (108) are connected to the distributed services node timing system (104, 106) and receive the data transmission frame (150). The digital cross-connect timing systems (108) retrieve the embedded timing signal from the data transmission frame (150).

Timing System And Method For Distributing A Timing Signal

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US Patent:
62856871, Sep 4, 2001
Filed:
Aug 12, 1999
Appl. No.:
9/373918
Inventors:
Gregory S. Lovelace - Sachse TX
Michael H. Jette - Grapevine TX
Steven D. Sensel - Blue Ridge TX
Edgar L. Read - Plano TX
Amanda G. Noe - Plano TX
Assignee:
Alcatel USA Sourcing, L.P. - Plano TX
International Classification:
H04Q 1104
US Classification:
370509
Abstract:
A timing system for distributing a timing signal includes a master timing system that receives a network timing reference. The master timing system generates a master timing signal from the network timing reference. A distributed services node timing system receives the master timing signal and embeds a timing signal into a data transmission frame. A network interface island receives the data transmission frame and retrieves the embedded timing signal therefrom.

Certification Apparatus For Voting In An Election

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US Patent:
20230082768, Mar 16, 2023
Filed:
Apr 18, 2022
Appl. No.:
17/722980
Inventors:
Amanda Geralyn Noe - Parker TX, US
International Classification:
G07C 13/00
G06K 1/12
Abstract:
An apparatus and method to certify a ballot for later verification or audit. The apparatus can receive the ballot and print, at a suitable area on the ballot, a certification code to certify the ballot. The certificate can include a serial number of the apparatus, name of the election, time and date of voting, a sequence number of the ballot, notary name, notary ID, Notary password, Election worker name, Election worker ID, Election worker password, GPS coordinates of the location of the apparatus, GPS date, GPS time, GPS ground speed, GPS tracking angle, Location name, location address, location ID, an image from a weather satellite of the cloud formation captured on the day of voting.
Amanda G Noe from Allen, TX, age ~59 Get Report