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Aman A Sewani

from Sunnyvale, CA
Age ~41
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Related to:
Shauket M Ali, 68Kashif S Ali, 42Naveed N Ali, 34Zulfiqar Ali, 56Nusrat Ali, 59Mohammad R Khan, 53Akber Ali, 56Abbas Ali, 58
Connected to:
Aamir B Sewani, 39Faiza Sewani, 31Mehtab Sewani, 39Al J Seward, 52Alberta L Seward, 105Allen J Seward, 51Ana D Seward, 61Barbara Seward, 66Bruce G Seward, 77Cameron T Seward, 38

Aman Sewani Phones & Addresses

  • Sunnyvale, CA
  • Mountain View, CA
  • Austin, TX
  • West Lafayette, IN

Work

Company: Xilinx Oct 2009 Address: San Jose, CA Position: Design engineer

Education

Degree: Master of Science (MS) School / High School: Santa Clara University 2008 to 2011 Specialities: Electrical Engineering

Skills

Pll • Integrated Circuit Design • Serdes • Mixed Signal • Analog Circuit Design

Industries

Semiconductors

Resumes

Resumes

Aman Sewani Photo 1

Design Engineer

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Location:
19750 northwest Phillips Rd, Hillsboro, OR 97124
Industry:
Semiconductors
Work:
Xilinx - San Jose, CA since Oct 2009
Design Engineer
NXP Semiconductors - San Jose, CA Jul 2009 - Sep 2009
Design Intern
Silicon Laboratories - Austin, TX Jan 2007 - Sep 2008
Design Engineer
Education:
Santa Clara University 2008 - 2011
Master of Science (MS), Electrical Engineering Purdue University 2003 - 2006
Bachelor of Science (BS), Electrical Engineering
Skills:
Pll
Integrated Circuit Design
Serdes
Mixed Signal
Analog Circuit Design

Publications

Us Patents

Method And Apparatus For Powering Down A Dual Supply Current Source

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US Patent:
8614599, Dec 24, 2013
Filed:
Dec 8, 2010
Appl. No.:
12/963154
Inventors:
Adebabay M. Bekele - San Jose CA, US
Aman Sewani - Sunnyvale CA, US
Xuewen Jiang - Chandler AZ, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H03K 17/687
G06F 1/32
G05F 1/46
US Classification:
327546, 327537, 327543, 307 80, 307 85, 365229
Abstract:
One embodiment of an integrated circuit includes a local circuit block, a first power supply for supplying power to a first terminal of the local circuit block, a second power supply for supplying power to a second terminal of the local circuit block, a first transmission gate coupled between the second terminal of the local circuit block and a current path from the second power supply, and a second transmission gate coupled between the current path from the second power supply and a gate of a p-type metal-oxide-semiconductor (PMOS) transistor in the first transmission gate, the second transmission gate including a single transistor.
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Aman A Sewani from Sunnyvale, CA, age ~41 Get Report