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Abhijeet K Ghadge

from San Jose, CA
Age ~49

Abhijeet Ghadge Phones & Addresses

  • 1690 Via Cortina, San Jose, CA 95120
  • 1056 Winchester Blvd, San Jose, CA 95128
  • 1568 Vista Club Cir, Santa Clara, CA 95054 (408) 564-4164
  • Sunnyvale, CA
  • Hackensack, NJ
  • 1690 Via Cortina, San Jose, CA 95120 (408) 564-4164

Publications

Us Patents

Error Containment For Enabling Local Checkpoint And Recovery

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US Patent:
20230011863, Jan 12, 2023
Filed:
Jul 12, 2021
Appl. No.:
17/373678
Inventors:
- Santa Clara CA, US
SAURABH HUKERIKAR - Santa Clara CA, US
PAUL RACUNAS - Landaff NH, US
NIRMAL RAJ SAXENA - LOS ALTOS HILLS CA, US
DAVID CHARLES PATRICK - MADISON AL, US
YIYANG FENG - San Jose CA, US
ABHIJEET GHADGE - San Jose CA, US
STEVEN JAMES HEINRICH - Madison AL, US
ADAM HENDRICKSON - San Jose CA, US
GENTARO HIROTA - Sunnyvale CA, US
PRAVEEN JOGINIPALLY - San Jose CA, US
VAISHALI KULKARNI - Sunnyvale CA, US
PETER C. MILLS - San Jose CA, US
SANDEEP NAVADA - San Jose CA, US
MANAN PATEL - San Jose CA, US
LIANG YIN - San Jose CA, US
International Classification:
G06F 11/10
G06F 11/07
G06F 11/14
G06F 12/1027
G06F 12/1018
Abstract:
Various embodiments include a parallel processing computer system that detects memory errors as a memory client loads data from memory and disables the memory client from storing data to memory, thereby reducing the likelihood that the memory error propagates to other memory clients. The memory client initiates a stall sequence, while other memory clients continue to execute instructions and the memory continues to service memory load and store operations. When a memory error is detected, a specific bit pattern is stored in conjunction with the data associated with the memory error. When the data is copied from one memory to another memory, the specific bit pattern is also copied, in order to identify the data as having a memory error.
Abhijeet K Ghadge from San Jose, CA, age ~49 Get Report